Re: [PATCH 10/15] dt-bindings: display/msm: Document A850 GPU and GMU

[Akhil P Oommen]

On 9/23/2026 6:30 PM, Krzysztof Kozlowski wrote:
> On 23/09/2026 12:25, Akhil P Oommen wrote:
>> Adreno A850 GPU found in Hawi SoC belongs to the A8x family and is
>> the successor to A840. Like A840, its clocks are described in the GMU
>> node and it has the following power related updates:
>>   1. GMU is now powered via a dedicated GDSC connected to MxG rail
>>   2. An additional power rail called Bx
> 
> I don't see the updated related to (2) above

This rail is voted and managed by the GMU HW directly. I will update the commit
text there to make it more clear.
> 
>>
>> Describe this GPU/GMU along with the new compatible strings.
>>
>> Signed-off-by: Akhil P Oommen <akhilpo@xxxxxxxxxxxxxxxx>
>> ---
>>  .../devicetree/bindings/display/msm/gmu.yaml       | 44 ++++++++++++++++++++++
>>  .../devicetree/bindings/display/msm/gpu.yaml       |  2 +
>>  2 files changed, 46 insertions(+)
>>
>> diff --git a/Documentation/devicetree/bindings/display/msm/gmu.yaml b/Documentation/devicetree/bindings/display/msm/gmu.yaml
>> index 9e459f12ce3f..875fd1242528 100644
>> --- a/Documentation/devicetree/bindings/display/msm/gmu.yaml
>> +++ b/Documentation/devicetree/bindings/display/msm/gmu.yaml
>> @@ -55,14 +55,18 @@ properties:
>>        - const: gmu
>>  
>>    power-domains:
>> +    minItems: 2
>>      items:
>>        - description: CX power domain
>>        - description: GX power domain
>> +      - description: GMU MX power domain
>>  
>>    power-domain-names:
>> +    minItems: 2
>>      items:
>>        - const: cx
>>        - const: gx
>> +      - const: gmu_mx
> 
> Your commit msg said mxg. Or mx, because this is GMU, so saying that
> it's power domain is GMU is redundant.

This is a GDSC that sits between GMU and the MxG rail. On a second
thought, I think we can call it just 'mxg'.
> 
>>  
>>    iommus:
>>      maxItems: 1
>> @@ -359,6 +363,46 @@ allOf:
>>              - const: memnoc
>>              - const: hub
>>  
>> +  - if:
>> +      properties:
>> +        compatible:
>> +          contains:
>> +            const: qcom,adreno-gmu-850.1
>> +    then:
>> +      properties:
>> +        reg:
>> +          items:
>> +            - description: Core GMU registers
>> +        reg-names:
>> +          items:
>> +            - const: gmu
>> +        clocks:
>> +          items:
>> +            - description: GMU clock
>> +            - description: GPU CX clock
>> +            - description: GPU MEMNOC clock
>> +            - description: GPU AHB clock
>> +            - description: GPU MXG AHB clock
>> +            - description: GMU HUB clock
>> +        clock-names:
>> +          items:
>> +            - const: gmu
>> +            - const: cxo
>> +            - const: memnoc
>> +            - const: ahb
> 
> Keep existing order. ahb is first.

Ack.

> 
>> +            - const: mxg_ahb
>> +            - const: hub
>> +        power-domains:
> 
> Just minItems

Ack

> 
>> +          items:
>> +            - description: CX power domain
>> +            - description: GX power domain
>> +            - description: GMU MX power domain
>> +        power-domain-names:
> 
> minItems
> 
> But OTOH you need to restrict power domains for every other variant

Okay. For every other entries here, will add the following:

power-domains:
  minItems: 2
  maxItems: 2

power-domain-names:
  items:
    - const: cx
    - const: gx

-Akhil

>> +          items:
>> +            - const: cx
>> +            - const: gx
>> +            - const: gmu_mx
>> +
>>    - if:
> Best regards,
> Krzysztof