[PATCH v2 0/2] serial: sc16is7xx: improve TX FIFO refill

[Paul Mbewe]

This series follows the TX inter-frame-gap work submitted as:

  [PATCH 0/2] serial: sc16is7xx: fix TX inter-frame gaps on SPI UARTs

Following review, the kfifo wrap-around fix was resent separately as a
standalone v2 patch. This series depends on that fix
because patch 1/2 extends its multi-segment TX refill loop.

The original trigger-level patch has been split into:

  1. a stale-TXLVL under-fill correctness fix; and
  2. a separate trigger-level load-reduction change.

Patch 1/2 re-reads TXLVL after each hardware TX FIFO write while data
remains queued. It continues refilling until the xmit kfifo is empty or
the hardware TX FIFO free space is strictly below the programmed
trigger. The hardware trigger and software refill threshold use the
same constant.

Patch 2/2 raises that trigger from 8 to 32 free spaces. This reduces the
TX refill rate by about 4x, but also reduces the time-to-empty after THRI
from 56 to 32 byte times.

The changes were tested with SC16IS752 over 1 MHz SPI on an i.MX6ULL
single-core PREEMPT_RT system, transmitting RS-485 at 115200 baud 8N1
under continuous Modbus RTU load. Each transaction used an 8-byte RX
request and a 255-byte TX response.

For the benchmark, "both TX fixes" includes the standalone kfifo
wrap-around fix and patch 1/2. "Fixes + trigger" additionally includes
patch 2/2.

                         before fixes   both TX fixes   fixes + trigger
                                           trigger=8       trigger=32
  SPI IRQ thread CPU          16%            15%             5%
  system CPU                  49%            44%            29%
  idle CPU                    36%            40%            52%
  one-minute load             2.04           2.02           0.99
  samples                     579            547            535

Comparing the final two configurations isolates patch 2/2. Raising the
trigger reduced median SPI IRQ thread CPU usage from 15% to 5% and
median system CPU usage from 44% to 29%, while median idle CPU increased
from 40% to 52%.

RX trigger tuning and generic RX/TX trigger configuration are left for
follow-up work.

Paul Mbewe (2):
  serial: sc16is7xx: refill TX FIFO below trigger using fresh TXLVL
  serial: sc16is7xx: reduce TX refill rate with half-FIFO trigger

 drivers/tty/serial/sc16is7xx.c | 38 ++++++++++++++++++++++++++++++--------
 1 file changed, 30 insertions(+), 8 deletions(-)
---
Changes in v2:
  - Submitted the kfifo wrap-around fix separately as a standalone patch
  - Split the original trigger-level patch into a stale-TXLVL correctness
    fix and an independent trigger-level load-reduction change
  - Re-read TXLVL and refill until free space is strictly below the
    programmed trigger; use the same constant for hardware and software
  - Corrected the trigger trade-off explanation and added post-fix A/B
    CPU and load measurements
  - Deferred generic RX/TX trigger configuration

Link: https://lore.kernel.org/linux-serial/20260623112225.82386-1-paultyson.mbewe@xxxxxxxxxxxxxx/
prerequisite-message-id: <20260928085559.3341419-1-paultyson.mbewe@xxxxxxxxxxxxxx>
prerequisite-patch-id: c177f0e42a7122bbb1accf4397c73ccec4eaabb6

base-commit: f0100363d8c374bd8e9ea7c9ba02744f0b802ca4
-- 
2.43.0