Re: [PATCH v8 04/11] arm64: dts: renesas: add support for solidrun rzg2l som and hb-iiot evb

[Josua Mayer]

Hi Geert,

Am 23.09.26 um 16:37 schrieb Geert Uytterhoeven:
> On Fri, 4 Sept 2026 at 13:56, Josua Mayer <josua@xxxxxxxxxxxxx> wrote:
>> Add support for the SolidRun RZ/G2L SoM [1] on HummingBoard IIoT [2].
>>
>> The SoM features:
>> - 2x 1Gbps Ethernet with PHY
>> - eMMC
>> - 1/2GB DDR
>> - WiFi + Bluetooth
>> - SDHI Mux switching between eMMC and Carrier Board
>>
>> The HummingBoard IIoT features:
>> - 3x USB-2.0 Type A connector
>> - 2x 1Gbps RJ45 Ethernet
>> - USB Type-C Console Port
>> - microSD connector
>> - RTC with backup battery
>> - RGB Status LED
>> - 1x M.2 B-Key connector with USB-2.0 + SIM card holder
>> - 1x DSI Display Connector
>> - GPIO header
>> - 2x RS232/RS485 ports (configurable)
>> - 2x CAN
>>
>> Descriptions for eMMC, microSD and RS485 are provided as overlays due to
>> their dependency on configurable mux states.
>>
>> [1] https://www.solid-run.com/embedded-industrial-iot/renesas-rz-family/rz-g2l-som/
>> [2] https://www.solid-run.com/embedded-industrial-iot/renesas-rz-family/hummingboard-rz-series-sbcs/hummingboard-rz-g2l-iot-sbc/
>>
>> Signed-off-by: Josua Mayer <josua@xxxxxxxxxxxxx>
> Thanks for your patch!
>
>> --- /dev/null
>> +++ b/arch/arm64/boot/dts/renesas/rzg2l-hummingboard-iiot-common.dtsi
>> +       aliases {
>> +               gpio1 = &tca6408_u48;
>> +               gpio2 = &tca6408_u37;
>> +               gpio3 = &tca6416_u20;
>> +               gpio4 = &tca6416_u21;
> The TCA64xx driver does not seem to support gpio aliases,
I have confirmed this now. My expectation was that setting gpio aliases
helps make /dev/gpiochip numbering predictable, however this does
not currently work.
> so please
> drop these.
Is this a good reason to drop the aliases, or better to define them 
regardless?
>
>> +               i2c3 = &i2c_exp;
>> +               i2c4 = &i2c_csi;
>> +               i2c5 = &i2c_dsi;
>> +               i2c6 = &i2c_lvds;
>> +               rtc0 = &carrier_rtc;
>> +               rtc1 = &pmic;
>> +               serial3 = &scif3;
>> +       };
>> +       v_1_2: regulator-1-2 {
> Preferred node name is "regulator-1v2"...
Ack, will change with v9, same for rzg2l-hummingboard-pulse-common.dtsi.
>
>> +               compatible = "regulator-fixed";
>> +               regulator-name = "1v2";
>> +               regulator-max-microvolt = <1200000>;
>> +               regulator-min-microvolt = <1200000>;
>> +       };
>> +
>> +       v_3_3: regulator-3-3 {
> ... "regulator-3v3".
Ack, will change with v9.
>
>> +               compatible = "regulator-fixed";
>> +               regulator-name = "3v3";
>> +               regulator-max-microvolt = <3300000>;
>> +               regulator-min-microvolt = <3300000>;
>> +       };
>> +&i2c0 {
>> +       /* highest i2c clock supported by all peripherals is 400kHz */
> We have a DT propery for that ;-)
>
>      clock-frequency = <400000>;
>
> Same for i2c1.

Indeed:

arch/arm64/boot/dts/renesas/rzg2l-sr-som.dtsi-&i2c0 {
arch/arm64/boot/dts/renesas/rzg2l-sr-som.dtsi:clock-frequency = <400000>;
arch/arm64/boot/dts/renesas/rzg2l-sr-som.dtsi-pinctrl-0 = <&i2c0_pins>;

arch/arm64/boot/dts/renesas/rzg2l-sr-som.dtsi-&i2c1 {
arch/arm64/boot/dts/renesas/rzg2l-sr-som.dtsi:clock-frequency = <400000>;
arch/arm64/boot/dts/renesas/rzg2l-sr-som.dtsi-pinctrl-0 = <&i2c1_pins>;

The bus is described in SoM dtsi, where G2LC has an eeprom on i2c0, and
G2L has one on i2c1.

The carrier dtsi then extends each bus with additional devices.
I found it worth restating the conclusive rate in carrier as a comment.

So I will keep clock-frequency in the som dtsi.

>
>> --- /dev/null
>> +++ b/arch/arm64/boot/dts/renesas/rzg2l-sr-som.dtsi
>> @@ -0,0 +1,480 @@
>> +// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
>> +/*
>> + * Device Tree Source for the RZ/G2L Solidrun SoM
>> + *
>> + * Copyright 2023 SolidRun Ltd.
>> + * Copyright 2025 Josua Mayer <josua@xxxxxxxxxxxxx>
>> + */
>> +
>> +#include <dt-bindings/gpio/gpio.h>
>> +#include <dt-bindings/pinctrl/rzg2l-pinctrl.h>
>> +
>> +/ {
>> +       aliases {
>> +               ethernet0 = &eth0;
>> +               ethernet1 = &eth1;
>> +               gpio0 = &pinctrl;
> The pin control driver does not support gpio aliases, so please
> drop this.
>
>> +               i2c0 = &i2c0;
>> +               i2c1 = &i2c1;
>> +               i2c2 = &i2c3;
>> +               mmc0 = &sdhi0;
>> +               mmc1 = &sdhi1;
>> +               rtc0 = &pmic;
>> +               serial0 = &scif0;
>> +               serial1 = &scif1;
>> +               serial2 = &scif2;
>> +       };
> I didn't compare with the board schematics, but the rest LGTM.

Thanks!