[PATCH] PCI: layerscape: async probe by default
From: Vincent Jardin via B4 Relay
Date: Mon Sep 28 2026 - 10:42:18 EST
From: Vincent Jardin <vjardin@xxxxxxx>
dw_pcie_wait_for_link() polls for up to
PCIE_LINK_WAIT_MAX_RETRIES x PCIE_LINK_WAIT_SLEEP_MS (10 x 90 ms)
per controller.
The controllers are probed one after the other, so, it leads to slow
boot time.
On an LX2160A board with 4 enabled controllers and no link on any
of them, ls_pcie_driver_init took almost 4s.
Probing the 4 in parallel allows to have it down to 1s.
The controllers are independent, other DWC based drivers are already
using async probing such as qcom, imx6, s32g, rcar-gen4 or stm32.
Signed-off-by: Vincent Jardin <vjardin@xxxxxxx>
---
drivers/pci/controller/dwc/pci-layerscape.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/pci/controller/dwc/pci-layerscape.c b/drivers/pci/controller/dwc/pci-layerscape.c
index 14d6ac4fc53f..7f37a0537159 100644
--- a/drivers/pci/controller/dwc/pci-layerscape.c
+++ b/drivers/pci/controller/dwc/pci-layerscape.c
@@ -419,6 +419,7 @@ static struct platform_driver ls_pcie_driver = {
.of_match_table = ls_pcie_of_match,
.suppress_bind_attrs = true,
.pm = &ls_pcie_pm_ops,
+ .probe_type = PROBE_PREFER_ASYNCHRONOUS,
},
};
module_platform_driver(ls_pcie_driver);
---
base-commit: 94e8d4e94266bb9737a5963810a3f9365cb2f39d
change-id: 20260928-for-upstream-pci-layerscape-async-probe-084cae5d0907
Best regards,
--
Vincent Jardin <vjardin@xxxxxxx>