Re: [PATCH 2/2] EDAC/amd64: Mask UMC chip select to the four implemented selects

[Borislav Petkov]

On Mon, Sep 28, 2026 at 10:38:21AM -0400, Yazen Ghannam wrote:
> I didn't consider this a necessary fix. But it'd be good to have it to
> avoid noise from reports.

I didn't either but what is Vishal doing to trigger this:

"Since only four csrows are allocated, a syndrome with bit 2 set decodes
to an out-of-range csrow and trips:

  EDAC MC0: INTERNAL ERROR: csrow value is out of range (5 >= 4)"

Vishal?

>From reading the commit message, I still have no clue how that happens and
what are we fixing here.

-- 
Regards/Gruss,
    Boris.

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