[PATCH net-next v2 2/3] net: pcs: rzn1-miic: Fix miic register initialization loop
From: Kyle Hendry via B4 Relay
Date: Mon Sep 28 2026 - 17:20:22 EST
From: Kyle Hendry <khendry@xxxxxxxxxxxxxxxxxxxx>
The function to write default values to miic registers was looping from
zero to miic_port_max, which might not cover all ports depending on SoC
numbering. Determine the port count from SoC data and loop over that.
Fixes: c112520de041758e ("net: pcs: rzn1-miic: move port range handling into SoC data")
Signed-off-by: Kyle Hendry <khendry@xxxxxxxxxxxxxxxxxxxx>
---
drivers/net/pcs/pcs-rzn1-miic.c | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/net/pcs/pcs-rzn1-miic.c b/drivers/net/pcs/pcs-rzn1-miic.c
index df70309c2d97..9e830932ce49 100644
--- a/drivers/net/pcs/pcs-rzn1-miic.c
+++ b/drivers/net/pcs/pcs-rzn1-miic.c
@@ -520,6 +520,7 @@ EXPORT_SYMBOL(miic_destroy);
static int miic_init_hw(struct miic *miic, u32 cfg_mode)
{
u8 sw_mode_mask = miic->of_data->sw_mode_mask;
+ int num_ports;
int port;
/* Unlock write access to accessory registers (cf datasheet). If this
@@ -535,7 +536,10 @@ static int miic_init_hw(struct miic *miic, u32 cfg_mode)
miic_reg_writel(miic, MIIC_MODCTRL,
((cfg_mode << __ffs(sw_mode_mask)) & sw_mode_mask));
- for (port = 0; port < miic->of_data->miic_port_max; port++) {
+ num_ports = miic->of_data->miic_port_max -
+ miic->of_data->miic_port_start + 1;
+
+ for (port = 0; port < num_ports; port++) {
miic_converter_enable(miic, port, 0);
/* Disable speed/duplex control from these registers, datasheet
* says switch registers should be used to setup switch port
--
2.43.0