[PATCH 2/5] soc: renesas: r9a09g05[67]-sys: Instantiate power sequencer auxiliary device

From: Prabhakar

Date: Tue Sep 29 2026 - 08:33:01 EST


From: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx>

On RZ/V2H(P) and RZ/V2N, the SYS_ADC_CFG.SY_MSTP_ADA bit controls the
power state of the A/D converter. RZ/V2H(P) has a single A/D converter
unit, while RZ/V2N has three units sharing the same bit.

Instantiate the power sequencer auxiliary device for both SoCs and
provide SoC-specific auxiliary device names so the power sequencer
driver can manage the shared power state across the ADC instances.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx>
---
drivers/soc/renesas/r9a09g056-sys.c | 2 ++
drivers/soc/renesas/r9a09g057-sys.c | 2 ++
2 files changed, 4 insertions(+)

diff --git a/drivers/soc/renesas/r9a09g056-sys.c b/drivers/soc/renesas/r9a09g056-sys.c
index e6a66688423f..3895583fde07 100644
--- a/drivers/soc/renesas/r9a09g056-sys.c
+++ b/drivers/soc/renesas/r9a09g056-sys.c
@@ -86,6 +86,8 @@ static const struct rz_sysc_soc_id_init_data rzv2n_sys_soc_id_init_data __initco
.revision_mask = GENMASK(31, 28),
.specific_id_mask = GENMASK(27, 0),
.print_id = rzv2n_sys_print_id,
+ .pwrrdy_pwrseq = true,
+ .pwrseq_aux_devname = "r9a09g056-pwrseq",
};

static bool rzv2n_regmap_readable_writeable_reg(unsigned int reg)
diff --git a/drivers/soc/renesas/r9a09g057-sys.c b/drivers/soc/renesas/r9a09g057-sys.c
index 308492c31acb..b9def8dc73ae 100644
--- a/drivers/soc/renesas/r9a09g057-sys.c
+++ b/drivers/soc/renesas/r9a09g057-sys.c
@@ -89,6 +89,8 @@ static const struct rz_sysc_soc_id_init_data rzv2h_sys_soc_id_init_data __initco
.revision_mask = GENMASK(31, 28),
.specific_id_mask = GENMASK(27, 0),
.print_id = rzv2h_sys_print_id,
+ .pwrrdy_pwrseq = true,
+ .pwrseq_aux_devname = "r9a09g057-pwrseq",
};

static bool rzv2h_regmap_readable_writeable_reg(unsigned int reg)
--
2.55.0