Re: [PATCH net-next v23 3/9] dt-bindings: mfd: Document support for Airoha AN8855 Switch SoC
From: netdev-bot+sashiko
Date: Tue Sep 29 2026 - 16:35:14 EST
Thank you for your contribution! Sashiko AI review found 1 potential
issue(s) to consider.
Critical: 0 · High: 0 · Medium: 1 · Low: 0
If you believe none of the issues are legitimate, please reply to each
issue of Medium severity or higher and explain why the AI is wrong.
If any of them are legitimate and you plan to respin, please let patchwork
know by including "pw-bot: cr" as a separate line at the end of your reply
(one such reply per series is enough).
- [Medium] Two bindings added in this series disagree on which MDIO
clause the same AN8855 internal PHY (ethernet-phy-idc0ff.0410) uses.
--
dt-bindings: mfd: Document support for Airoha AN8855 Switch SoC
This commit adds a DT binding for the Airoha AN8855 Switch SoC. The SoC
exposes an Ethernet switch, an efuse NVMEM provider and internal Ethernet
PHYs on an mdio subnode. The example shows the full layout, including the
nvmem cells the internal PHYs use.
> diff --git a/Documentation/devicetree/bindings/mfd/airoha,an8855.yaml b/Documentation/devicetree/bindings/mfd/airoha,an8855.yaml
> new file mode 100644
> index 0000000000000..48127e956c965
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/mfd/airoha,an8855.yaml
[ ... ]
> + mdio {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + internal_phy1: ethernet-phy@1 {
> + compatible = "ethernet-phy-idc0ff.0410",
> + "ethernet-phy-ieee802.3-c22";
[Severity: Medium]
This example describes the internal PHY (ethernet-phy-idc0ff.0410) as
ethernet-phy-ieee802.3-c22. The PHY binding added later in this series,
Documentation/devicetree/bindings/net/airoha,an8855-phy.yaml, describes
the same PHY as ethernet-phy-ieee802.3-c45 in its ethernet-phy@1 and
ethernet-phy@2 examples. Which one is intended?
The drivers later in the series suggest c22 is correct. The MFD core
registers each PHY on an mdio-regmap bus, and devm_mdio_regmap_register()
sets up only the C22 ops:
drivers/net/mdio/mdio-regmap.c:devm_mdio_regmap_register() {
...
mii->read = mdio_regmap_read_c22;
mii->write = mdio_regmap_write_c22;
...
}
bus->read_c45 is never set.
Now take a board DT that copies the c45 example from the PHY binding.
an8855_core_probe() would register each PHY like this:
an8855_core_probe()
fwnode_mdiobus_register_phy() /* is_c45 = true */
get_phy_device(bus, addr, true)
get_phy_c45_ids()
get_phy_c45_devs_in_pkg()
mdiobus_c45_read() /* -EOPNOTSUPP, no read_c45 */
get_phy_c45_devs_in_pkg() turns that error into -EIO. The failure then
goes through err_put_fwnodes in an8855_core_probe().
Wouldn't that fail the whole AN8855 core probe, and with it the switch
and efuse children? The schema can't catch this because both compatibles
are valid under ethernet-phy.yaml.
This example looks correct. Should the c45 examples in
airoha,an8855-phy.yaml be changed to c22 so the two bindings match?
> + reg = <1>;
> +
> + nvmem-cells = <&shift_sel_port0_tx_a>,
> + <&shift_sel_port0_tx_b>,
> + <&shift_sel_port0_tx_c>,
> + <&shift_sel_port0_tx_d>;
> + nvmem-cell-names = "tx_a", "tx_b", "tx_c", "tx_d";
> + };
> +
> + internal_phy2: ethernet-phy@2 {
> + compatible = "ethernet-phy-idc0ff.0410",
> + "ethernet-phy-ieee802.3-c22";
[ ... ]
--
Sashiko AI review · https://netdev-ai.bots.linux.dev/sashiko/#/patchset/20260925182435.21207-1-ansuelsmth%40gmail.com