[PATCH v2] x86/apic/msi: Fix MSI interrupt affinity configuration

[WeitaoWang-oc]

commit b56ebe7c896d ("x86/apic/msi: Fix misconfigured non-maskable MSI
quirk") try to fix the issue of misconfigured non-maskable MSI quirk.
For non-maskable MSI interrupts, use the slow path to fix the MSI affinity
race. Maskable MSI interrupts use the direct path to update configuration
info. However, the current code logic is the opposite as only maskable
MSI interrupts will enable reservation mode. Therefore, when using the
reservation mode in the function msi_set_affinity() to decide whether
to take the direct update path, polarity inversion is required.

Fixes: b56ebe7c896d ("x86/apic/msi: Fix misconfigured non-maskable MSI quirk")
Reviewed-by: Koichiro Den <den@xxxxxxxxxxxxx>
Cc: stable@xxxxxxxxxxxxxxx
Signed-off-by: Weitao Wang <WeitaoWang-oc@xxxxxxxxxxx>
---
Changes in v2:
 - Change the Fixes tag to b56ebe7c896d ("x86/apic/msi: Fix misconfigured
   non-maskable MSI quirk")
 - Update commit messages for clarity

 arch/x86/kernel/apic/msi.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/x86/kernel/apic/msi.c b/arch/x86/kernel/apic/msi.c
index 66bc5d3e79db..da5f44a80313 100644
--- a/arch/x86/kernel/apic/msi.c
+++ b/arch/x86/kernel/apic/msi.c
@@ -62,7 +62,7 @@ msi_set_affinity(struct irq_data *irqd, const struct cpumask *mask, bool force)
 	 * - The interrupt is not yet started up
 	 * - The new destination CPU is the same as the old destination CPU
 	 */
-	if (!irqd_can_reserve(irqd) ||
+	if (irqd_can_reserve(irqd) ||
 	    cfg->vector == old_cfg.vector ||
 	    old_cfg.vector == MANAGED_IRQ_SHUTDOWN_VECTOR ||
 	    !irqd_is_started(irqd) ||
-- 
2.32.0