Re: R: [PATCH v2 0/3] arm64: dts: marvell: Add Sophos XGS 107w NPU

[Gregory Clement]

On Wednesday, September 30, 2026 10:35 CEST, Nicolò Giuliani - nicolo.giuliani6@xxxxxxxxxxxxxxx <nicolo.giuliani6@xxxxxxxxxxxxxxx> wrote:

> 
> Hi Gregory, Andrew, Sebastian,
Hello  Nicolo,

> This series has Acked-by from Krzysztof on 1/3 and 2/3, and Reviewed-by from Andrew on 3/3. Is there anything else needed before it can be applied, or should I wait for the next merge window?

I am working on the backlog today, either I will apply it or I will let know if something is missing.

Gregory

> 
> Thanks,
> Nicolo Giuliani
> 
> ________________________________________
> Da: Nicolo Giuliani via B4 Relay <devnull+nicolo.giuliani6.studio.unibo.it@xxxxxxxxxx>
> Inviato: lunedì 21 settembre 2026 02:26
> A: Rob Herring; Krzysztof Kozlowski; Conor Dooley; Andrew Lunn; Gregory Clement; Sebastian Hesselbarth
> Cc: devicetree@xxxxxxxxxxxxxxx; linux-kernel@xxxxxxxxxxxxxxx; linux-arm-kernel@xxxxxxxxxxxxxxxxxxx; Nicolò Giuliani - nicolo.giuliani6@xxxxxxxxxxxxxxx; Krzysztof Kozlowski
> Oggetto: [PATCH v2 0/3] arm64: dts: marvell: Add Sophos XGS 107w NPU
> 
> The Sophos XGS 87/107 desktop firewalls pair an AMD x86 host with a
> separate network processing unit (NPU): a Marvell Armada CN9130 SoC with
> its own eMMC and SPI NOR flash. The NPU serves the eight RJ45 ports and
> the SFP cage through a Marvell 88E6193X switch on its MDIO bus, which is
> connected to the SoC by a 10GBASE-R link, and reaches the x86 host over
> PCIe.
> 
> This series adds the Sophos vendor prefix, the compatible string of the
> NPU board and a device tree that describes the NPU as a standalone system:
> UART console, eMMC, SPI NOR flash, the SFP cage and the switch with its
> ports. The port LEDs, the USB ports and the PCIe link to the x86 host (the
> CN9130 acts as a PCIe endpoint towards it, which needs endpoint support
> that is not part of this series) are not described.
> 
> Tested on an XGS 107w with Linux 6.18: boot from eMMC, eMMC and SPI NOR
> access, the mvpp2 link to the switch at 10 Gb/s, the 88E6193X probing with
> its eight user ports, and 936 Mbit/s through a front port. The SFP cage
> is untested.
> 
> dt_binding_check passes for vendor-prefixes.yaml and armada-7k-8k.yaml,
> and CHECK_DTBS=y on marvell/cn9130-sophos-xgs107w.dtb reports no warning
> specific to this board.
> 
> Based on the mvebu/dt branch of the mvebu tree (008e9faade).
> 
> Signed-off-by: Nicolo Giuliani <nicolo.giuliani6@xxxxxxxxxxxxxxx>
> ---
> Changes in v2:
> - Patch 1: drop the second sentence of the commit message, add Acked-by
> - Patch 2: move the entry before the SolidRun ones and list only
>   marvell,cn9130 after the board compatible, as the other CN9130 boards do
> - Patch 3: use the compatible list of patch 2; pass the switch reset as
>   reset-gpios and drop the boot loader workaround; remove the LED
>   expander node and the SFP address comment
> - Link to v1: https://patch.msgid.link/20260919-send-dt-v1-0-365615a74ef3@xxxxxxxxxxxxxxx
> 
> ---
> Nicolo Giuliani (3):
>       dt-bindings: vendor-prefixes: Add Sophos
>       dt-bindings: arm: marvell: Add Sophos XGS 107w NPU
>       arm64: dts: marvell: Add Sophos XGS 107w NPU board
> 
>  .../bindings/arm/marvell/armada-7k-8k.yaml         |   7 +
>  .../devicetree/bindings/vendor-prefixes.yaml       |   2 +
>  arch/arm64/boot/dts/marvell/Makefile               |   1 +
>  .../boot/dts/marvell/cn9130-sophos-xgs107w.dts     | 188 +++++++++++++++++++++
>  4 files changed, 198 insertions(+)
> ---
> base-commit: 008e9faadef8c0aaa9b8a3ff05a2126e3c5b08b7
> change-id: 20260919-send-dt-6bbd08a470d2
> 
> Best regards,
> --
> Nicolo Giuliani <nicolo.giuliani6@xxxxxxxxxxxxxxx>
> 
>