[PATCH v2 0/2] Add StarFive JHB100 DWCMSHC controller support

[Changhuang Liang]

Add DWCMSHC controller driver for StarFive JHB100 SoC.
This series has been tested on the JHB100 EVB1 board.

Due to syscon limitations, it is necessary to use dma-ranges
to restrict the DMA address space of the eMMC controller to:
[0x400000000 - 0x4ffffffff]

bus_nioc_4g: bus_nioc_4g {
	compatible = "simple-bus";
	#address-cells = <2>;
	#size-cells = <2>;
	dma-noncoherent;
	ranges;
	dma-ranges = <0x4 0x00000000 0x0 0x40000000 0x1 0x0>,
		     <0x4 0x00000000 0x4 0x00000000 0x1 0x0>;

	emmc0: mmc@11b00000 {
		compatible = "starfive,jhb100-dwcmshc";
		reg = <0x0 0x11b00000 0x0 0x10000>;
	};
};

Changes since v1:

patch 1:
- Add Krzysztof's Reviewed-by tag

patch 2:
- Fix the DMA address range error in the commit message
- Clarify the 36-bit DMA capability and its constraints
- Add a named macro for the JHB100 delay line value
- Use dwcmshc_reset instead of sdhci_reset
- Detect 1.8V capability from mmc->caps/caps2 instead of DT properties
- In sdhci_jhb100_set_clock(), keep cclk_tx gated when clock is 0.

v1: https://lore.kernel.org/all/20260919092950.178617-1-changhuang.liang@xxxxxxxxxxxxxxxx/

Changhuang Liang (2):
  dt-bindings: mmc: snps,dwcmshc-sdhci: Add starfive,jhb100-dwcmshc
  mmc: sdhci-of-dwcmshc: Add support for StarFive JHB100

 .../bindings/mmc/snps,dwcmshc-sdhci.yaml      |  74 +++++++-
 drivers/mmc/host/sdhci-of-dwcmshc.c           | 169 ++++++++++++++++++
 2 files changed, 239 insertions(+), 4 deletions(-)

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2.25.1