linux-next: manual merge of the kvm-x86 tree with the kvm-fixes tree

[Mark Brown]

Hi all,

Today's linux-next merge of the kvm-x86 tree got a conflict in:

  tools/testing/selftests/kvm/x86/nested_x2apic_test.c

between commits:

  b630929bcc4c8 ("KVM: selftests: Extend nested x2APIC test to validate disabling x2APIC virt")
  b0bc51910f039 ("KVM: selftests: Extend nested x2APIC test to validate using eVMCS for vmcs12")

from the kvm-fixes tree and commits:

  9b2f8146fcef9 ("KVM: selftests: Extend nested x2APIC test to validate disabling x2APIC virt")
  a4bab1c12fd52 ("KVM: selftests: Extend nested x2APIC test to validate using eVMCS for vmcs12")

from the kvm-x86 tree.

I fixed it up (see below) and can carry the fix as necessary. This
is now fixed as far as linux-next is concerned, but any non trivial
conflicts should be mentioned to your upstream maintainer when your tree
is submitted for merging.  You may also want to consider cooperating
with the maintainer of the conflicting tree to minimise any particularly
complex conflicts.

diff --combined tools/testing/selftests/kvm/x86/nested_x2apic_test.c
index ce204ce29a9c0,2ae698c9aa1ce..0000000000000
--- a/tools/testing/selftests/kvm/x86/nested_x2apic_test.c
+++ b/tools/testing/selftests/kvm/x86/nested_x2apic_test.c
@@@ -61,57 -61,55 +61,57 @@@ static void l1_vmx_code(struct vmx_page
  		evmcs_enable();
  	}
  
 -	prepare_for_vmx_operation(vmx);
 +	GUEST_ASSERT_EQ(prepare_for_vmx_operation(vmx), true);
  
  	if (hv_pages) {
 -		load_evmcs(hv_pages);
 +		GUEST_ASSERT(load_evmcs(hv_pages));
  		current_evmcs->hv_enlightenments_control.msr_bitmap = 1;
  	} else {
 -		load_vmcs(vmx);
 +		GUEST_ASSERT(load_vmcs(vmx));
  	}
  
  	prepare_vmcs(vmx, NULL);
- 	GUEST_ASSERT_EQ(vmwrite(GUEST_RIP, (unsigned long)l2_guest_code), 0);
+ 	vmwrite(GUEST_RIP, (unsigned long)l2_guest_code);
  
 -	control = vmread(PIN_BASED_VM_EXEC_CONTROL);
 +	control = vmreadz(PIN_BASED_VM_EXEC_CONTROL);
  	control |= PIN_BASED_EXT_INTR_MASK;
  	vmwrite(PIN_BASED_VM_EXEC_CONTROL, control);
  
 -	control = vmread(CPU_BASED_VM_EXEC_CONTROL);
 +	control = vmreadz(CPU_BASED_VM_EXEC_CONTROL);
  	control |= CPU_BASED_USE_MSR_BITMAPS | CPU_BASED_TPR_SHADOW;
 -	vmwrite(CPU_BASED_VM_EXEC_CONTROL, control);
 +	GUEST_ASSERT_EQ(vmwrite(CPU_BASED_VM_EXEC_CONTROL, control), 0);
  
 -	control = vmread(SECONDARY_VM_EXEC_CONTROL);
 +	control = vmreadz(SECONDARY_VM_EXEC_CONTROL);
  	control |= SECONDARY_EXEC_VIRTUALIZE_X2APIC_MODE |
  		   SECONDARY_EXEC_APIC_REGISTER_VIRT |
  		   SECONDARY_EXEC_VIRTUAL_INTR_DELIVERY;
  	control &= (rdmsr(MSR_IA32_VMX_PROCBASED_CTLS2) >> 32);
 -	vmwrite(SECONDARY_VM_EXEC_CONTROL, control);
 +	GUEST_ASSERT_EQ(vmwrite(SECONDARY_VM_EXEC_CONTROL, control), 0);
  
 -	vmlaunch();
 -	GUEST_ASSERT_EQ(vmread(VM_EXIT_REASON), EXIT_REASON_CPUID);
 -	vmwrite(GUEST_RIP, vmread(GUEST_RIP) + vmread(VM_EXIT_INSTRUCTION_LEN));
 +	GUEST_ASSERT(!vmlaunch());
 +	GUEST_ASSERT_EQ(vmreadz(VM_EXIT_REASON), EXIT_REASON_CPUID);
 +	GUEST_ASSERT_EQ(vmwrite(GUEST_RIP,
 +			vmreadz(GUEST_RIP) + vmreadz(VM_EXIT_INSTRUCTION_LEN)), 0);
  }
  
  static void l1_vmx_code_part2(void)
  {
  	u64 control;
  
 -	control = vmread(CPU_BASED_VM_EXEC_CONTROL);
 +	control = vmreadz(CPU_BASED_VM_EXEC_CONTROL);
  	control &= ~CPU_BASED_TPR_SHADOW;
 -	vmwrite(CPU_BASED_VM_EXEC_CONTROL, control);
 +	GUEST_ASSERT_EQ(vmwrite(CPU_BASED_VM_EXEC_CONTROL, control), 0);
  
 -	control = vmread(SECONDARY_VM_EXEC_CONTROL);
 +	control = vmreadz(SECONDARY_VM_EXEC_CONTROL);
  	control &= ~(SECONDARY_EXEC_VIRTUALIZE_X2APIC_MODE |
  			SECONDARY_EXEC_APIC_REGISTER_VIRT |
  			SECONDARY_EXEC_VIRTUAL_INTR_DELIVERY);
 -	vmwrite(SECONDARY_VM_EXEC_CONTROL, control);
 +	GUEST_ASSERT_EQ(vmwrite(SECONDARY_VM_EXEC_CONTROL, control), 0);
  
 -	vmresume();
 -	GUEST_ASSERT_EQ(vmread(VM_EXIT_REASON), EXIT_REASON_CPUID);
 -	vmwrite(GUEST_RIP, vmread(GUEST_RIP) + vmread(VM_EXIT_INSTRUCTION_LEN));
 +	GUEST_ASSERT(!vmresume());
 +	GUEST_ASSERT_EQ(vmreadz(VM_EXIT_REASON), EXIT_REASON_CPUID);
 +	GUEST_ASSERT_EQ(vmwrite(GUEST_RIP,
 +			vmreadz(GUEST_RIP) + vmreadz(VM_EXIT_INSTRUCTION_LEN)), 0);
  }
  
  static void l1_test_x2apic_intercepts(void)

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