Re: [PATCH 2/8] iio: adc: rzt2h: Wait for the analog part to stop after a forced stop

[Lad, Prabhakar]

Hi Andy,

Thank you for the review.

On Wed, Sep 30, 2026 at 10:24 AM Andy Shevchenko
<andriy.shevchenko@xxxxxxxxx> wrote:
>
> On Tue, Sep 29, 2026 at 01:42:42PM +0100, Prabhakar wrote:
>
> > When ADCSR.ADST is cleared to forcibly stop a conversion, the analog part
> > of the A/D converter can take up to 2 ADCLK cycles to stop operating.
> >
> > Wait for the write to ADCSR to complete and allow the analog part to stop
> > before reconfiguring or restarting the converter.
>
> ...
>
> > +     /*
> > +      * When a conversion is forcibly stopped, the analog part of the A/D
> > +      * converter takes up to 2 ADCLK cycles to stop operating.
> > +      */
> > +     ndelay(DIV_ROUND_UP_ULL((u64)RZT2H_ADC_STOP_CYCLES * NSEC_PER_SEC,
> > +                             adc->adclk_rate));
>
> I do not see the point in having _ULL (64-bit) division. Do you?
>
Agreed, I will make use of DIV_ROUND_UP() instead.

Cheers,
Prabhakar