[PATCH] riscv: dts: sophgo: cv1800b-milkv-duo: enable ethernet
From: Hiago De Franco
Date: Wed Sep 30 2026 - 21:29:23 EST
The CV1800B SoC has a DWMAC controller connected to an internal 10/100
Ethernet PHY. Both the MAC (gmac0) and the MDIO multiplexer used to
reach the internal PHY are already described in cv180x.dtsi, but are
disabled by default.
Enable gmac0 and the MDIO multiplexer to make ethernet work.
Tested on a Milk-V Duo (CV1800B) with its IO base board. The link comes
up at 100Mbps/Full and the interface gets an address via DHCP.
Signed-off-by: Hiago De Franco <hfranco@xxxxxxxxxxxx>
---
Hi,
This was tested on MilkV Duo 64M (CV1800B) with the IO board, to use the
ethernet connector. Log:
root@milkv-duo:~# ip a
1: lo: <LOOPBACK,UP,LOWER_UP> mtu 65536 qdisc noqueue qlen 1000
link/loopback 00:00:00:00:00:00 brd 00:00:00:00:00:00
inet 127.0.0.1/8 scope host lo
valid_lft forever preferred_lft forever
2: eth0: <BROADCAST,MULTICAST,UP,LOWER_UP> mtu 1500 qdisc mq qlen 1000
link/ether e2:b0:30:2c:e8:16 brd ff:ff:ff:ff:ff:ff
inet 192.168.0.74/24 brd 192.168.0.255 scope global eth0
valid_lft forever preferred_lft forever
root@milkv-duo:~# dmesg | grep stmmaceth
[ 0.583766] stmmaceth 4070000.ethernet: IRQ eth_wake_irq not found
[ 0.590691] stmmaceth 4070000.ethernet: IRQ sfty not found
[ 0.597211] stmmaceth 4070000.ethernet: Hash table entries set to unexpected value 0
[ 0.607833] stmmaceth 4070000.ethernet: User ID: 0x10, Synopsys ID: 0x37
[ 0.615538] stmmaceth 4070000.ethernet: DWMAC1000
[ 0.620820] stmmaceth 4070000.ethernet: DMA HW capability register supported
[ 0.628360] stmmaceth 4070000.ethernet: Active PHY interface: RMII (4)
[ 0.635356] stmmaceth 4070000.ethernet: RX Checksum Offload Engine supported
[ 0.642881] stmmaceth 4070000.ethernet: COE Type 2
[ 0.648072] stmmaceth 4070000.ethernet: TX Checksum insertion supported
[ 0.655153] stmmaceth 4070000.ethernet: Normal descriptors
[ 0.661063] stmmaceth 4070000.ethernet: Ring mode enabled
[ 0.666880] stmmaceth 4070000.ethernet: Enable RX Mitigation via HW Watchdog Timer
[ 0.675084] stmmaceth 4070000.ethernet: device MAC address e2:b0:30:2c:e8:16
[ 14.965810] stmmaceth 4070000.ethernet eth0: Register MEM_TYPE_PAGE_POOL RxQ-0
[ 14.986562] stmmaceth 4070000.ethernet eth0: PHY [mdio_mux-0.0:01] driver [Generic PHY] (irq=POLL)
[ 15.050700] stmmaceth 4070000.ethernet eth0: No Safety Features support found
[ 15.092635] stmmaceth 4070000.ethernet eth0: IEEE 1588-2002 Timestamp supported
[ 15.114625] stmmaceth 4070000.ethernet eth0: configuring for phy/internal link mode
[ 17.193586] stmmaceth 4070000.ethernet eth0: Link is Up - 100Mbps/Full - flow control rx/tx
---
arch/riscv/boot/dts/sophgo/cv1800b-milkv-duo.dts | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/riscv/boot/dts/sophgo/cv1800b-milkv-duo.dts b/arch/riscv/boot/dts/sophgo/cv1800b-milkv-duo.dts
index 0e6d79e6e3a4..6fcd1d1f451f 100644
--- a/arch/riscv/boot/dts/sophgo/cv1800b-milkv-duo.dts
+++ b/arch/riscv/boot/dts/sophgo/cv1800b-milkv-duo.dts
@@ -35,6 +35,14 @@ coprocessor_rtos: region@83f40000 {
};
};
+&gmac0 {
+ status = "okay";
+};
+
+&mdio {
+ status = "okay";
+};
+
&osc {
clock-frequency = <25000000>;
};
---
base-commit: 72d3fcf802c45d00b300f25b848a93c3a2bd7c7e
change-id: 20260930-milkv-duo-ethernet-6d73d6d054b9
Best regards,
--
Hiago