Re: [PATCH v2] clk: qcom: gcc-sm6375: Use common clock controller probe data

[Taniya Das]

On 9/30/2026 7:23 PM, Abel Vesa wrote:
> Move the always-on branch register offsets into a critical_cbcrs array
> and describe the DFS RCGs through qcom_cc_driver_data.
> 
> Associate GPLL10, GPLL11, GPLL8 and GPLL9 with their existing configuration
> data and list them in alpha_plls. The common PLL helper selects the Lucid
> and Zonda configuration routines from their register layouts. This uses
> the common initialization order, configuring the PLLs before enabling
> the always-on branches, instead of the previous CBCR-before-PLL order.
> 
> Use qcom_cc_probe() to perform the common initialization instead of
> open-coding it in the driver's probe.
> 
> Assisted-by: LLM
> Signed-off-by: Abel Vesa <abel.vesa@xxxxxxxxxxxxxxxx>
> ---
> Changes in v2:
> - Rebase on next-20260929.
> - Configure GPLL10, GPLL11, GPLL8 and GPLL9 through alpha_plls.
> - Drop the clk_regs_configure callback.
> - Document the common PLL-before-CBCR initialization order.
> - Link to v1: https://patch.msgid.link/20260926-clk-qcom-gcc-sm6375-rework-always-on-
> clocks-v1-1-28f581ab0289@xxxxxxxxxxxxxxxx
> ---
>  drivers/clk/qcom/gcc-sm6375.c | 50 ++++++++++++++++++++++++-------------------
>  1 file changed, 28 insertions(+), 22 deletions(-)
> 
> diff --git a/drivers/clk/qcom/gcc-sm6375.c b/drivers/clk/qcom/gcc-sm6375.c
> index 9c2acf8dc4b7..2c7a6a4e2a2d 100644
> --- a/drivers/clk/qcom/gcc-sm6375.c
> +++ b/drivers/clk/qcom/gcc-sm6375.c
> @@ -149,6 +149,7 @@ static const struct alpha_pll_config gpll10_config = {

Reviewed-by: Taniya Das <taniya.das@xxxxxxxxxxxxxxxx>

-- 
Thanks,
Taniya Das