Re: [PATCH v7 05/35] drm/msm/dp: add support for programming p1/p2/p3 register blocks

From: Dmitry Baryshkov

Date: Thu Oct 01 2026 - 06:25:02 EST


On Tue, Sep 29, 2026 at 12:25:29PM +0800, Yongxing Mou wrote:
> From: Abhinav Kumar <quic_abhinavk@xxxxxxxxxxx>
>
> Each MST stream uses its own pixel register block. Extend pixel
> register access beyond p0 to support up to four streams.
>
> Not all controllers provide all four blocks. Check for optional
> resources before mapping them to avoid misleading probe errors when
> they are absent, while propagating mapping failures for resources
> that are present.
>
> Track each block's size separately so register snapshots use the
> size of the corresponding resource.
>
> Signed-off-by: Abhinav Kumar <quic_abhinavk@xxxxxxxxxxx>
> Signed-off-by: Yongxing Mou <yongxing.mou@xxxxxxxxxxxxxxxx>
> ---
> drivers/gpu/drm/msm/dp/dp_ctrl.c | 10 +++++
> drivers/gpu/drm/msm/dp/dp_ctrl.h | 2 +
> drivers/gpu/drm/msm/dp/dp_display.c | 56 ++++++++++++++++++-----
> drivers/gpu/drm/msm/dp/dp_panel.c | 90 ++++++++++++++++++-------------------
> drivers/gpu/drm/msm/dp/dp_panel.h | 2 +-
> 5 files changed, 103 insertions(+), 57 deletions(-)
>

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@xxxxxxxxxxxxxxxx>


--
With best wishes
Dmitry