Re: [PATCH v2 2/2] spi: axi-spi-engine: fix stale SYNC IRQ pending in trigger_enable

[Nuno Sá]

On Thu, Oct 01, 2026 at 12:58:52PM +0100, Mark Brown wrote:
> On Thu, Oct 01, 2026 at 07:55:45AM +0100, Nuno Sá wrote:
> > On Wed, 2026-09-30 at 14:09 +0100, Mark Brown wrote:
> 
> > > I'm not seeing anything here for the issue with ensuring posted writes
> > > are completed before we drop the lock?  The write may not be visible on
> > > enother CPU, we need a read from the controller or something.
> 
> > Just for my understanding, why would it be an issue? The trigger register seems to
> > only be accessible from the trigger callbacks which are protected by a lock where we
> > have implied barriers. Im sure I'm missing what can go wrong here :)
> 
> Are you sure that's true for mutexes?  I thought they only covered
> memory, not device stuff, but ICBW.

Oh right, likely not a full barrier

- Nuno Sá