Re: [PATCH v2 0/2] Add arm-smmu-v3 support for Laguna SMMU silicon erratum workaround

[Will Deacon]

On Fri, 11 Sep 2026 21:21:04 +0000, Peter Griffin wrote:
> The Google Tensor G5 SoC (Laguna) has a silicon erratum with the SMMU
> integration where the AxPROT[2] signal is always 1, which makes all
> transactions appear as instructions.
> 
> As a software workaround we make use of the INSTCFG override feature to
> force all incoming traffic to data.
> 
> [...]

Applied first patch to iommu (arm/smmu/bindings), thanks!

[1/2] dt-bindings: iommu: arm,smmu-v3: Add arm,instdata-override property
      https://git.kernel.org/iommu/c/87098700b3cb

Cheers,
-- 
Will

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