[PATCH 2/3] arm64: dts: mediatek: mt8188: Add power allocator parameters to CPU zones
From: Michał Kopeć
Date: Sat Oct 03 2026 - 15:32:09 EST
Under sustained load the CPU temperature on MT8188 rises from the passive
trip to the 100 C critical trip within seconds, faster than the step-wise
governor lowers the CPU frequency one step per poll, so the system hits a
thermal shutdown instead of throttling.
Describe the CPU thermal zones the way the ChromeOS kernel describes the
MT8188 SoC zone for the power allocator governor:
- a 68 C passive switch-on trip before the existing control trip,
- a sustainable power of 1500 mW,
- both CPU clusters as cooling devices in every CPU zone, weighted 2345
for the little and 1024 for the big cluster,
- a 100 ms passive polling interval.
The step-wise governor ignores the switch-on trip, which has no cooling
devices, so zones that don't use the power allocator keep their existing
trip points. Limit the new little cluster maps of the big zones to the
four remaining little cores on MT8370.
Signed-off-by: Michał Kopeć <michal@nozomi.space>
---
arch/arm64/boot/dts/mediatek/mt8188.dtsi | 110 +++++++++++++++++++++--
arch/arm64/boot/dts/mediatek/mt8370.dtsi | 14 +++
2 files changed, 118 insertions(+), 6 deletions(-)
diff --git a/arch/arm64/boot/dts/mediatek/mt8188.dtsi b/arch/arm64/boot/dts/mediatek/mt8188.dtsi
index 14a320f0c70cb..07f5f4e62d7d6 100644
--- a/arch/arm64/boot/dts/mediatek/mt8188.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8188.dtsi
@@ -471,10 +471,17 @@ sound: sound {
thermal_zones: thermal-zones {
cpu-little0-thermal {
polling-delay = <1000>;
- polling-delay-passive = <150>;
+ polling-delay-passive = <100>;
thermal-sensors = <&lvts_mcu MT8188_MCU_LITTLE_CPU0>;
+ sustainable-power = <1500>;
trips {
+ cpu_little0_switch_on: trip-switch-on {
+ temperature = <68000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+
cpu_little0_alert0: trip-alert0 {
temperature = <85000>;
hysteresis = <2000>;
@@ -503,16 +510,31 @@ cpu_little0_cooling_map0: map0 {
<&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+ contribution = <2345>;
+ };
+
+ map1 {
+ trip = <&cpu_little0_alert0>;
+ cooling-device = <&cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+ contribution = <1024>;
};
};
};
cpu-little1-thermal {
polling-delay = <1000>;
- polling-delay-passive = <150>;
+ polling-delay-passive = <100>;
thermal-sensors = <&lvts_mcu MT8188_MCU_LITTLE_CPU1>;
+ sustainable-power = <1500>;
trips {
+ cpu_little1_switch_on: trip-switch-on {
+ temperature = <68000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+
cpu_little1_alert0: trip-alert0 {
temperature = <85000>;
hysteresis = <2000>;
@@ -541,16 +563,31 @@ cpu_little1_cooling_map0: map0 {
<&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+ contribution = <2345>;
+ };
+
+ map1 {
+ trip = <&cpu_little1_alert0>;
+ cooling-device = <&cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+ contribution = <1024>;
};
};
};
cpu-little2-thermal {
polling-delay = <1000>;
- polling-delay-passive = <150>;
+ polling-delay-passive = <100>;
thermal-sensors = <&lvts_mcu MT8188_MCU_LITTLE_CPU2>;
+ sustainable-power = <1500>;
trips {
+ cpu_little2_switch_on: trip-switch-on {
+ temperature = <68000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+
cpu_little2_alert0: trip-alert0 {
temperature = <85000>;
hysteresis = <2000>;
@@ -579,16 +616,31 @@ cpu_little2_cooling_map0: map0 {
<&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+ contribution = <2345>;
+ };
+
+ map1 {
+ trip = <&cpu_little2_alert0>;
+ cooling-device = <&cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+ contribution = <1024>;
};
};
};
cpu-little3-thermal {
polling-delay = <1000>;
- polling-delay-passive = <150>;
+ polling-delay-passive = <100>;
thermal-sensors = <&lvts_mcu MT8188_MCU_LITTLE_CPU3>;
+ sustainable-power = <1500>;
trips {
+ cpu_little3_switch_on: trip-switch-on {
+ temperature = <68000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+
cpu_little3_alert0: trip-alert0 {
temperature = <85000>;
hysteresis = <2000>;
@@ -617,6 +669,14 @@ cpu_little3_cooling_map0: map0 {
<&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+ contribution = <2345>;
+ };
+
+ map1 {
+ trip = <&cpu_little3_alert0>;
+ cooling-device = <&cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+ contribution = <1024>;
};
};
};
@@ -625,8 +685,15 @@ cpu-big0-thermal {
polling-delay = <1000>;
polling-delay-passive = <100>;
thermal-sensors = <&lvts_mcu MT8188_MCU_BIG_CPU0>;
+ sustainable-power = <1500>;
trips {
+ cpu_big0_switch_on: trip-switch-on {
+ temperature = <68000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+
cpu_big0_alert0: trip-alert0 {
temperature = <85000>;
hysteresis = <2000>;
@@ -647,10 +714,22 @@ cpu_big0_crit: trip-crit {
};
cooling-maps {
- map0 {
+ cpu_big0_cooling_map0: map0 {
+ trip = <&cpu_big0_alert0>;
+ cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+ contribution = <2345>;
+ };
+
+ map1 {
trip = <&cpu_big0_alert0>;
cooling-device = <&cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+ contribution = <1024>;
};
};
};
@@ -659,8 +738,15 @@ cpu-big1-thermal {
polling-delay = <1000>;
polling-delay-passive = <100>;
thermal-sensors = <&lvts_mcu MT8188_MCU_BIG_CPU1>;
+ sustainable-power = <1500>;
trips {
+ cpu_big1_switch_on: trip-switch-on {
+ temperature = <68000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+
cpu_big1_alert0: trip-alert0 {
temperature = <85000>;
hysteresis = <2000>;
@@ -681,10 +767,22 @@ cpu_big1_crit: trip-crit {
};
cooling-maps {
- map0 {
+ cpu_big1_cooling_map0: map0 {
+ trip = <&cpu_big1_alert0>;
+ cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+ contribution = <2345>;
+ };
+
+ map1 {
trip = <&cpu_big1_alert0>;
cooling-device = <&cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+ contribution = <1024>;
};
};
};
diff --git a/arch/arm64/boot/dts/mediatek/mt8370.dtsi b/arch/arm64/boot/dts/mediatek/mt8370.dtsi
index 7ac8b8d034945..61801f79e729e 100644
--- a/arch/arm64/boot/dts/mediatek/mt8370.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8370.dtsi
@@ -59,6 +59,20 @@ &cpu_little3_cooling_map0 {
<&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
};
+&cpu_big0_cooling_map0 {
+ cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+};
+
+&cpu_big1_cooling_map0 {
+ cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+};
+
/*
* Please note that overriding compatibles is a discouraged practice and is a
* clear indication of nodes not being, well, compatible!
--
2.55.0