Re: [PATCH v18 04/11] phy: qcom-mipi-csi2: Parametrise the common status register offset
From: Bryan O'Donoghue
Date: Sat Oct 03 2026 - 17:14:07 EST
On 03/10/2026 12:10, Hangxiang Ma wrote:
Since v15 the series has been based on the new CSI-2 re-architecture,diff --git a/drivers/phy/qualcomm/phy-qcom-mipi-csi2.h b/drivers/phy/Aren't you using the CSIPHY driver in drivers/phy now ?
qualcomm/phy-qcom-mipi-csi2.h
index 7e55ae007370..d6366f809e51 100644
--- a/drivers/phy/qualcomm/phy-qcom-mipi-csi2.h
+++ b/drivers/phy/qualcomm/phy-qcom-mipi-csi2.h
@@ -51,6 +51,7 @@ struct mipi_csi2phy_device_regs {
const struct mipi_csi2phy_lane_regs *init_seq;
const int lane_array_size;
const u32 common_regs_offset;
+ const u32 common_status_offset;
};
struct mipi_csi2_genpd {
So if phy stuff has to change then that change needs to go into drivers/phy
---
bod
and this change is a prerequisite for the subsequent patches. The main
reason for keeping this in the Kaanapali series is to avoid introducing
an extra dependency and keep the series self-contained, which should
help with mergeability.
If you'd prefer this to go through the PHY tree, I'm happy to split it out.
phy driver is in -next now so there's no out-of-tree dependency.
---
bod