Re: [PATCH v10 02/13] iommu/arm-smmu-v3: Make the ASID space per SMMU instance

[Will Deacon]

On Sun, Aug 30, 2026 at 04:18:03PM -0700, Nicolin Chen wrote:
> An ASID tags the TLB entries within one SMMU, so two instances can use the
> same ASID without ever aliasing each other. Yet the driver allocates them
> out of a single global xarray, which makes the instances share a space that
> the hardware keeps apart, and lets one instance exhaust the IDs of another.
> 
> That global space is a leftover from the BTM support that shared ASIDs with
> the CPU. Now ARM_SMMU_FEAT_BTM is never set, nothing looks a domain up by
> its ASID, and a domain is pinned to one SMMU at the attach.

We probably need to figure out what we're doing with BTM. Over at:

https://lore.kernel.org/r/20260907184513.GA2543240@xxxxxxxx

Jason was talking about bringing it back once the remaining invs stuff
has landed. If that happens, what is the correct sequence to allocate
the same ASID on every SMMU instance after these patches?

Will