Re: [PATCH 06/15] mtd: spi-nor: Fix WRSR with ODTR chips

[Miquel Raynal]

On 02/10/2026 at 12:34:31 GMT, sashiko-bot@xxxxxxxxxx wrote:

> Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider:
> - [High] mtd: spi-nor: state leak in spi_nor_write_sr_ll() due to
> missing WEL cleanup

I don't think we care. If the chip fails here, we probably have a bus
issue. Write Enable guards very little anyway.

> - [High] mtd: spi-nor: 16-bit status register writes erroneously
> rejected in 8-8-8 DTR mode

Not a problem with octal DTR chips: there is no "write sr1 and sr2
opcode".

I will disregard these two comments, unless someone asks me to take care
of them.

Miquèl