Re: [PATCH 21/38] MIPS: SGI-IP27: route XBridge and PIC DMA through the 32-bit window

From: Christoph Hellwig

Date: Mon Oct 05 2026 - 04:40:23 EST


On Thu, Oct 01, 2026 at 06:11:56PM +0200, Imre Kaloz wrote:
> XBridge does not honour the SN0-style 64-bit direct-mapped DMA address:
> commands complete but no data moves. PIC moves no data either. Route
> both through the 2GB 32-bit window and cap bus_dma_limit at its top, so
> SWIOTLB bounces anything above it. PIC is flagged once a following
> patch enumerates it.
>
> Only XBridge (part 0xd002) is flagged; a Bridge (0xc002) behind a Hub
> keeps the 64-bit direct map. The 64MB bounce pool comes from node 0
> whenever DRAM passes 2GB, on Hub any multi-node machine. A PIC bus in
> PCI-X mode takes the window too; IRIX does not.

It's been a while, but IIRC XBridge also support 64-bit direct-mapped
DMA addresses, just differently.

If you find a late 2.4 or early 2.6 kernel, it comes with an open source
copy of the IRIX-style PCI code under arch/ia64/ that also includes the
older chips never used on Altix. It might be worth to take a look at
that for clues.