[PATCH 0/2] drivers: pwm: add mcf5441X mcPWM support

[Angelo Dureghello]

This patchset add mcf54415 (ColdFire SoC from NXP) mcPWM minimal support.

The "motor control" (mc) pulse width modulator module (PWM) contains four
PWM submodules, each able to control a single half-bridge power stage.

There are 4 independet 16bit counters, i.e. to drive 3-phases motors, the
total counter range can be limited by SMnINIT (start) and SMnVAL1 (end),
in ticks. SMnVAL0 must be set to the middle (half range).
SMnVAL2/3 defines the positive PWM part for channel A, SMnVAL3/4 for B.

In each example, R.M. uses signed values. Reason seems to be:

"Control loop algorithms (like PID controllers or Vector Control matrices)
natively calculate output corrections as signed error vectors (e.g., -50%
to +50% torque or voltage correction)."

So using the same numerical format from this algorithms (signed values)
avoid to reformat values to be written in the VALx registers. This is of
course useful for bare metal drivers programming, but i have to maintain
signed values to have prescaler working (all-unsigned way works but only
with prescaler 0). This seems to be a possible hw bug.

In this initial implementation only output A of the dual-output (A and B)
works for each of the 4 subchannels.

Validation has been done on stmark2 open board, checks by oscilloscope.

---
Angelo Dureghello (2):
      m68k: mcf5441x: add PWM defines
      drivers: pwm: add mcf54415 mcPWM support

 arch/m68k/include/asm/m5441xsim.h |   7 +
 drivers/pwm/Kconfig               |  11 +
 drivers/pwm/Makefile              |   1 +
 drivers/pwm/pwm-mcf.c             | 646 ++++++++++++++++++++++++++++++++++++++
 4 files changed, 665 insertions(+)
---
base-commit: 02156c061b7dfe437f9054b3e353c69fde0f7a58
change-id: 20260828-wip-bl-stmark2-pwm-acd1bcaf39a7

Best regards,
--  
Angelo Dureghello <adureghello@xxxxxxxxxxxx>