Re: [PATCH v4 6/6] phy: qcom: snps-femto-v2: Add IPQ9650 support
From: Varadarajan Narayanan
Date: Mon Oct 05 2026 - 06:45:38 EST
On Mon, Oct 05, 2026 at 10:17:32AM +0300, Dmitry Baryshkov wrote:
> On Mon, Oct 05, 2026 at 12:06:31PM +0530, Varadarajan Narayanan wrote:
> > Add the 6 nm SNPS femto USB2 PHY configuration needed by IPQ9650. The PHYs
> > on this SoC require a dedicated init sequence and override parameters
> > before they can be enabled.
> >
> > Signed-off-by: Varadarajan Narayanan <varadarajan.narayanan@xxxxxxxxxxxxxxxx>
> > ---
> > drivers/phy/qualcomm/phy-qcom-snps-femto-v2.c | 62 +++++++++++++++++++++++++++
> > 1 file changed, 62 insertions(+)
> >
> > diff --git a/drivers/phy/qualcomm/phy-qcom-snps-femto-v2.c b/drivers/phy/qualcomm/phy-qcom-snps-femto-v2.c
> > index b6bbf2b570c7..8957f208bc51 100644
> > --- a/drivers/phy/qualcomm/phy-qcom-snps-femto-v2.c
> > +++ b/drivers/phy/qualcomm/phy-qcom-snps-femto-v2.c
> > @@ -29,12 +29,15 @@
> >
> > #define USB2_PHY_USB_PHY_UTMI_CTRL5 (0x50)
> > #define POR BIT(1)
> > +#define ATERESET BIT(0)
> >
> > #define USB2_PHY_USB_PHY_HS_PHY_CTRL_COMMON0 (0x54)
> > #define SIDDQ BIT(2)
> > #define RETENABLEN BIT(3)
> > #define FSEL_MASK GENMASK(6, 4)
> > #define FSEL_DEFAULT (0x3 << 4)
> > +#define FSEL_24MHZ (0x2 << 4)
>
> Use FIELD_PREP, please.
Not able to use FIELD_PREP, getting this compilation error.
CC drivers/phy/qualcomm/phy-qcom-snps-femto-v2.o
drivers/phy/qualcomm/phy-qcom-snps-femto-v2.c:449:53: error: statement expression not allowed at file scope
449 | { USB2_PHY_USB_PHY_HS_PHY_CTRL_COMMON0, FSEL_MASK, FSEL_24MHZ },
| ^
drivers/phy/qualcomm/phy-qcom-snps-femto-v2.c:39:23: note: expanded from macro 'FSEL_24MHZ'
39 | #define FSEL_24MHZ FIELD_PREP(FSEL_MASK, 2)
| ^
./include/linux/bitfield.h:136:2: note: expanded from macro 'FIELD_PREP'
136 | ({ \
| ^
Thanks
Varada
>
> > +#define VATESTENB_MASK GENMASK(1, 0)
> >
> > #define USB2_PHY_USB_PHY_HS_PHY_CTRL_COMMON1 (0x58)
> > #define VBUSVLDEXTSEL0 BIT(4)
>
> --
> With best wishes
> Dmitry