RE: [PATCH v2 00/15] MTU3 counter fixes and improvements

[Cosmin-Gabriel Tanislav]

> From: Biju Das <biju.das.jz@xxxxxxxxxxxxxx>
> Sent: Monday, October 5, 2026 11:45 AM
> 
> Hi Cosmin,
> 
> Thanks for the series.
> 
> > -----Original Message-----
> > From: Cosmin Tanislav <cosmin-gabriel.tanislav.xa@xxxxxxxxxxx>
> > Sent: 04 October 2026 18:48
> > Subject: [PATCH v2 00/15] MTU3 counter fixes and improvements
> >
> > This series does some code quality improvements to the MTU3 counter subdriver, while also fixing
> bugs and
> > adding caching support so that registers are not touched when the counter is disabled, as there is
> no
> > request API.
> 
> I believe you need to rebase this series on top of[1].
> 
> Since this patch series is caching userspace values in memory,
> It can support suspend to RAM as well as in suspend to RAM,we lose
> the register contents, this patch series can address that limitation.
> Can you also please prepare a follow up patches for STR support?
> 
> [1] https://lore.kernel.org/all/20260903090719.3498955-1-dayou5941@xxxxxxx/
> 

Hi Biju.

The changes from patch 1 of Li's series will simply be dropped by us if
I rebase on top of it.

The changes from patch 2 of Li's series are superseded by our cleanups.

The changes from patch 3 of Li's series depend on his patch 2 changes,
and are equivalent to our patch 1.

I think it would be best if Li re-submitted just patch 3 alone without
any dependencies, so that it can be accepted, since he also submitted
it before we did and we duplicated his work accidentally.

After his patch is accepted I will re-submit this series without patch
1.

What do you think, William, Li?