Re: [PATCH v2 15/15] arm64: dts: renesas: r8a779f0: Describe the PCIe AER interrupts
From: Koichiro Den
Date: Mon Oct 05 2026 - 13:12:17 EST
On Sat, Oct 03, 2026 at 10:00:13PM +0200, Marek Vasut wrote:
> On 9/28/26 6:52 PM, Koichiro Den wrote:
> > The PCIe controllers report Root Port AER notifications through
> > intreq_pci0_lperr (SPI 421) and intreq_pci1_lperr (SPI 428),
> > respectively, separately from the integrated MSI receiver interrupts.
> > Describe these interrupts with the "aer" name so the controller driver
> > can use them for Root Port error reporting.
> >
> > Append the new interrupts to preserve the existing interrupt indices.
> >
> > Reviewed-by: Marek Vasut <marek.vasut+renesas@xxxxxxxxxxx>
> > Signed-off-by: Koichiro Den <den@xxxxxxxxxxxxx>
Hi Marek,
> Please also feel free to add this patch for R-Car V4H (performed cover
> letter tests 2 and 3 on Retronix Sparrow Hawk)
>
> diff --git a/arch/arm64/boot/dts/renesas/r8a779g0.dtsi
> b/arch/arm64/boot/dts/renesas/r8a779g0.dtsi
> index 5284923b6cef7..8342d3c6f9881 100644
> --- a/arch/arm64/boot/dts/renesas/r8a779g0.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r8a779g0.dtsi
> @@ -801,8 +801,9 @@ pciec0: pcie@e65d0000 {
> interrupts = <GIC_SPI 449 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 450 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 451 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 455 IRQ_TYPE_LEVEL_HIGH>;
> - interrupt-names = "msi", "dma", "sft_ce", "app";
> + <GIC_SPI 455 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 454 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "msi", "dma", "sft_ce", "app",
> "aer";
> clocks = <&cpg CPG_MOD 624>, <&pcie0_clkref>;
> clock-names = "core", "ref";
> power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
> @@ -850,8 +851,9 @@ pciec1: pcie@e65d8000 {
> interrupts = <GIC_SPI 456 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 457 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 458 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 462 IRQ_TYPE_LEVEL_HIGH>;
> - interrupt-names = "msi", "dma", "sft_ce", "app";
> + <GIC_SPI 462 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 461 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "msi", "dma", "sft_ce", "app",
> "aer";
> clocks = <&cpg CPG_MOD 625>, <&pcie1_clkref>;
> clock-names = "core", "ref";
> power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
>
> And a matching patch for R-Car V4M (boot tested, but the board has no PCIe
> device plugged into the slot)
>
> diff --git a/arch/arm64/boot/dts/renesas/r8a779h0.dtsi
> b/arch/arm64/boot/dts/renesas/r8a779h0.dtsi
> index 5f9223a0f4468..a377aab3c8be0 100644
> --- a/arch/arm64/boot/dts/renesas/r8a779h0.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r8a779h0.dtsi
> @@ -683,8 +683,9 @@ pciec0: pcie@e65d0000 {
> interrupts = <GIC_SPI 449 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 450 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 451 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 455 IRQ_TYPE_LEVEL_HIGH>;
> - interrupt-names = "msi", "dma", "sft_ce", "app";
> + <GIC_SPI 455 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 454 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "msi", "dma", "sft_ce", "app",
> "aer";
> clocks = <&cpg CPG_MOD 624>, <&pcie0_clkref>;
> clock-names = "core", "ref";
> power-domains = <&sysc R8A779H0_PD_A2PCIPHY>;
Thanks! I'll add them as two separate patches in v3, with your Suggested-by.
Best regards
Koichiro Den