[PATCH 2/3] dt-bindings: serial: snps-dw-apb-uart: Add Allwinner A733
From: Vinicius Pedrosa
Date: Mon Oct 05 2026 - 13:41:14 EST
The Allwinner A733 UART is a DesignWare APB UART with two SoC-specific
differences. Its baud clock is the bus clock gate, which can't change
rate, and offset 0xc0 holds an RS485 control register instead of DLF.
Add a SoC-specific compatible, with "snps,dw-apb-uart" as the fallback.
Signed-off-by: Vinicius Pedrosa <vinicius.eduardo.pedrosa@xxxxxxxxx>
---
Documentation/devicetree/bindings/serial/snps-dw-apb-uart.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.yaml b/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.yaml
index 86dc25919311..aa8cab5ba3d3 100644
--- a/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.yaml
+++ b/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.yaml
@@ -51,6 +51,7 @@ properties:
- const: renesas,rzn1-uart
- items:
- enum:
+ - allwinner,sun60i-a733-uart
- anlogic,dr1v90-uart
- brcm,bcm11351-dw-apb-uart
- brcm,bcm21664-dw-apb-uart
--
2.43.0