Re: [PATCH v1 1/3] ASoC: codecs: wsa885x: Reset registers on teardown for B2B playback

[Prasad Kumpatla]

On 10/6/2026 2:03 PM, Ajay Kumar Nandam wrote:
> On 10/6/2026 11:07 AM, Prasad Kumpatla wrote:
> > During back-to-back speaker playback the PA sometimes fails to enable
> > because a few I2S/TDM and clock source registers retain their previous
> > state and are not reprogrammed on the next stream.
> >
> > Reset the relevant I2S/TDM, clock source and bandgap override registers
> > in hw_free() so the codec is torn down cleanly and the speaker amplifier
> > comes up reliably on back-to-back use cases. Move the bandgap override
> > reset out of set_sysclk() into the teardown path where it belongs.
> >
> > Signed-off-by: Prasad Kumpatla <prasad.kumpatla@xxxxxxxxxxxxxxxx>
> > ---
> >   sound/soc/codecs/wsa885x.c | 11 ++++++++++-
> >   1 file changed, 10 insertions(+), 1 deletion(-)
> >
> > diff --git a/sound/soc/codecs/wsa885x.c b/sound/soc/codecs/wsa885x.c
> > index 1faa8541a872..5ffbf9e89fd9 100644
> > --- a/sound/soc/codecs/wsa885x.c
> > +++ b/sound/soc/codecs/wsa885x.c
> > @@ -896,7 +896,6 @@ static int wsa885x_codec_set_sysclk(struct 
> > snd_soc_dai *dai, int clk_id,
> >         regmap_write(wsa885x->regmap, WSA885X_DIG_CTRL0_SYS_CLK_SEL, 
> > 0x00);
> >       regmap_write(wsa885x->regmap, WSA885X_DIG_CTRL0_POWER_FSM_CTL1, 
> > 0x01);
> > -    regmap_write(wsa885x->regmap, WSA885X_ANA_TOP_BG_TVP_OVRD_CTL, 
> > 0x00);
> >         return 0;
> >   }
> > @@ -1006,6 +1005,16 @@ static int wsa885x_codec_hw_free(struct 
> > snd_pcm_substream *substream,
> >                    struct snd_soc_dai *dai)
> >   {
> >       static const struct reg_sequence regs[] = {
> > +        { WSA885X_DIG_CTRL1_I2S_RESET_CTL, 0x00 },
> > +        { WSA885X_DIG_CTRL1_I2S_CFG0_TDM_TX, 0x00 },
> > +        { WSA885X_DIG_CTRL1_I2S_CFG1_TDM_TX, 0x00 },
> > +        { WSA885X_DIG_CTRL1_I2S_TDM_CTL1, 0x05 },
> > +        { WSA885X_DIG_CTRL1_I2S_TDM_CTL0, 0x00 },
> > +        { WSA885X_DIG_CTRL1_I2S_TDM_CH_TX, 0x00 },
> > +        { WSA885X_DIG_CTRL1_I2S_CTL0, 0x06 },
> > +        { WSA885X_DIG_CTRL1_I2S_TDM_CH_RX, 0x08 },
> > +        { WSA885X_DIG_CTRL0_CLK_SOURCE_ENABLE, 0x00 },
> > +        { WSA885X_ANA_TOP_BG_TVP_OVRD_CTL, 0x00 },
>
>
> This moves the BG_TVP override clear from immediately after a 
> successful PLL lock to hw_free(), so WSA885X_ANA_TOP_BG_TVP_OVRD_CTL 
> appears to remain at 0x03 for the lifetime of the active stream.
>
> Is that intentional for the back-to-back playback fix? If the override 
> is only needed during PLL programming/lock, keeping the old immediate 
> clear and also resetting it during hw_free() would preserve the 
> existing active-stream behavior while still cleaning up the teardown 
> path.


The override remaining at 0x03 during the active stream is intentional. 
The teardown sequence requires clearing |BG_TVP_OVRD_CTL| only after the 
PLL is disabled and the device has entered PS3. Doing this earlier in 
set_sysclk() violates that sequence and causes the
back-to-back playback issue. Since mute_stream() already transitions the 
device to PS3,hw_free() is the first safe point for this cleanup.

Thanks,
Prasad

> Thanks
> Ajay Kumar Nandam
>
>
> >           { WSA885X_DIG_CTRL0_PA_FSM_CTL, 0x00 },
> >       };
> >       struct wsa885x_priv *wsa885x;