[PATCH v2 02/17] ARM: dts: samsung: exynos4: order *-names properties

From: Henrik Grimler

Date: Tue Oct 06 2026 - 07:58:16 EST


pinctrl-names, clock-names and interrupt-names should be after
pinctrl-*, clocks and interrupts respectively. Re-order all of them to
make the files consistent.

dt-check-style in strict mode reports the issues like:

samsung/exynos4.dtsi:745: [property-order] property 'interrupt-names' must be placed after 'interrupts'
samsung/exynos4.dtsi:788: [property-order] property 'clock-names' must be placed after 'clocks'
samsung/exynos4.dtsi:810: [property-order] property 'pinctrl-names' must be placed after 'pinctrl-0'

Signed-off-by: Henrik Grimler <henrik.grimler@xxxxxxxx>
---
arch/arm/boot/dts/samsung/exynos4.dtsi | 50 +++++++++++++++++-----------------
1 file changed, 25 insertions(+), 25 deletions(-)

diff --git a/arch/arm/boot/dts/samsung/exynos4.dtsi b/arch/arm/boot/dts/samsung/exynos4.dtsi
index c38489a05e15..f69b01423ae0 100644
--- a/arch/arm/boot/dts/samsung/exynos4.dtsi
+++ b/arch/arm/boot/dts/samsung/exynos4.dtsi
@@ -524,8 +524,8 @@ i2c_0: i2c@13860000 {
interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_I2C0>;
clock-names = "i2c";
- pinctrl-names = "default";
pinctrl-0 = <&i2c0_bus>;
+ pinctrl-names = "default";

status = "disabled";
};
@@ -538,8 +538,8 @@ i2c_1: i2c@13870000 {
interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_I2C1>;
clock-names = "i2c";
- pinctrl-names = "default";
pinctrl-0 = <&i2c1_bus>;
+ pinctrl-names = "default";

status = "disabled";
};
@@ -552,8 +552,8 @@ i2c_2: i2c@13880000 {
interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_I2C2>;
clock-names = "i2c";
- pinctrl-names = "default";
pinctrl-0 = <&i2c2_bus>;
+ pinctrl-names = "default";

status = "disabled";
};
@@ -566,8 +566,8 @@ i2c_3: i2c@13890000 {
interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_I2C3>;
clock-names = "i2c";
- pinctrl-names = "default";
pinctrl-0 = <&i2c3_bus>;
+ pinctrl-names = "default";

status = "disabled";
};
@@ -580,8 +580,8 @@ i2c_4: i2c@138a0000 {
interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_I2C4>;
clock-names = "i2c";
- pinctrl-names = "default";
pinctrl-0 = <&i2c4_bus>;
+ pinctrl-names = "default";

status = "disabled";
};
@@ -594,8 +594,8 @@ i2c_5: i2c@138b0000 {
interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_I2C5>;
clock-names = "i2c";
- pinctrl-names = "default";
pinctrl-0 = <&i2c5_bus>;
+ pinctrl-names = "default";

status = "disabled";
};
@@ -608,8 +608,8 @@ i2c_6: i2c@138c0000 {
interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_I2C6>;
clock-names = "i2c";
- pinctrl-names = "default";
pinctrl-0 = <&i2c6_bus>;
+ pinctrl-names = "default";

status = "disabled";
};
@@ -622,8 +622,8 @@ i2c_7: i2c@138d0000 {
interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_I2C7>;
clock-names = "i2c";
- pinctrl-names = "default";
pinctrl-0 = <&i2c7_bus>;
+ pinctrl-names = "default";

status = "disabled";
};
@@ -655,8 +655,8 @@ spi_0: spi@13920000 {
#size-cells = <0>;
clocks = <&clock CLK_SPI0>, <&clock CLK_SCLK_SPI0>;
clock-names = "spi", "spi_busclk0";
- pinctrl-names = "default";
pinctrl-0 = <&spi0_bus>;
+ pinctrl-names = "default";
fifo-depth = <256>;

status = "disabled";
@@ -672,8 +672,8 @@ spi_1: spi@13930000 {
#size-cells = <0>;
clocks = <&clock CLK_SPI1>, <&clock CLK_SCLK_SPI1>;
clock-names = "spi", "spi_busclk0";
- pinctrl-names = "default";
pinctrl-0 = <&spi1_bus>;
+ pinctrl-names = "default";
fifo-depth = <64>;

status = "disabled";
@@ -689,8 +689,8 @@ spi_2: spi@13940000 {
#size-cells = <0>;
clocks = <&clock CLK_SPI2>, <&clock CLK_SCLK_SPI2>;
clock-names = "spi", "spi_busclk0";
- pinctrl-names = "default";
pinctrl-0 = <&spi2_bus>;
+ pinctrl-names = "default";
fifo-depth = <64>;

status = "disabled";
@@ -742,8 +742,8 @@ fimd: fimd@11c00000 {
compatible = "samsung,exynos4210-fimd";
interrupt-parent = <&combiner>;
reg = <0x11c00000 0x20000>;
- interrupt-names = "fifo", "vsync", "lcd_sys";
interrupts = <11 0>, <11 1>, <11 2>;
+ interrupt-names = "fifo", "vsync", "lcd_sys";
clocks = <&clock CLK_SCLK_FIMD0>, <&clock CLK_FIMD0>;
clock-names = "sclk_fimd", "fimd";
power-domains = <&pd_lcd0>;
@@ -785,12 +785,12 @@ hdmi: hdmi@12d00000 {
compatible = "samsung,exynos4210-hdmi";
reg = <0x12d00000 0x70000>;
interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>;
- clock-names = "hdmi", "sclk_hdmi", "sclk_pixel",
- "sclk_hdmiphy", "mout_hdmi";
clocks = <&clock CLK_HDMI>, <&clock CLK_SCLK_HDMI>,
<&clock CLK_SCLK_PIXEL>,
<&clock CLK_SCLK_HDMIPHY>,
<&clock CLK_MOUT_HDMI>;
+ clock-names = "hdmi", "sclk_hdmi", "sclk_pixel",
+ "sclk_hdmiphy", "mout_hdmi";
phy = <&hdmi_i2c_phy>;
power-domains = <&pd_tv>;
samsung,syscon-phandle = <&pmu_system_controller>;
@@ -807,8 +807,8 @@ hdmicec: cec@100b0000 {
clock-names = "hdmicec";
samsung,syscon-phandle = <&pmu_system_controller>;
hdmi-phandle = <&hdmi>;
- pinctrl-names = "default";
pinctrl-0 = <&hdmi_cec>;
+ pinctrl-names = "default";

status = "disabled";
};
@@ -943,8 +943,8 @@ sysmmu_mfc_l: sysmmu@13620000 {
reg = <0x13620000 0x1000>;
interrupt-parent = <&combiner>;
interrupts = <5 5>;
- clock-names = "sysmmu", "master";
clocks = <&clock CLK_SMMU_MFCL>, <&clock CLK_MFC>;
+ clock-names = "sysmmu", "master";
power-domains = <&pd_mfc>;
#iommu-cells = <0>;
};
@@ -954,8 +954,8 @@ sysmmu_mfc_r: sysmmu@13630000 {
reg = <0x13630000 0x1000>;
interrupt-parent = <&combiner>;
interrupts = <5 6>;
- clock-names = "sysmmu", "master";
clocks = <&clock CLK_SMMU_MFCR>, <&clock CLK_MFC>;
+ clock-names = "sysmmu", "master";
power-domains = <&pd_mfc>;
#iommu-cells = <0>;
};
@@ -965,8 +965,8 @@ sysmmu_tv: sysmmu@12e20000 {
reg = <0x12e20000 0x1000>;
interrupt-parent = <&combiner>;
interrupts = <5 4>;
- clock-names = "sysmmu", "master";
clocks = <&clock CLK_SMMU_TV>, <&clock CLK_MIXER>;
+ clock-names = "sysmmu", "master";
power-domains = <&pd_tv>;
#iommu-cells = <0>;
};
@@ -976,8 +976,8 @@ sysmmu_fimc0: sysmmu@11a20000 {
reg = <0x11a20000 0x1000>;
interrupt-parent = <&combiner>;
interrupts = <4 2>;
- clock-names = "sysmmu", "master";
clocks = <&clock CLK_SMMU_FIMC0>, <&clock CLK_FIMC0>;
+ clock-names = "sysmmu", "master";
power-domains = <&pd_cam>;
#iommu-cells = <0>;
};
@@ -987,8 +987,8 @@ sysmmu_fimc1: sysmmu@11a30000 {
reg = <0x11a30000 0x1000>;
interrupt-parent = <&combiner>;
interrupts = <4 3>;
- clock-names = "sysmmu", "master";
clocks = <&clock CLK_SMMU_FIMC1>, <&clock CLK_FIMC1>;
+ clock-names = "sysmmu", "master";
power-domains = <&pd_cam>;
#iommu-cells = <0>;
};
@@ -998,8 +998,8 @@ sysmmu_fimc2: sysmmu@11a40000 {
reg = <0x11a40000 0x1000>;
interrupt-parent = <&combiner>;
interrupts = <4 4>;
- clock-names = "sysmmu", "master";
clocks = <&clock CLK_SMMU_FIMC2>, <&clock CLK_FIMC2>;
+ clock-names = "sysmmu", "master";
power-domains = <&pd_cam>;
#iommu-cells = <0>;
};
@@ -1009,8 +1009,8 @@ sysmmu_fimc3: sysmmu@11a50000 {
reg = <0x11a50000 0x1000>;
interrupt-parent = <&combiner>;
interrupts = <4 5>;
- clock-names = "sysmmu", "master";
clocks = <&clock CLK_SMMU_FIMC3>, <&clock CLK_FIMC3>;
+ clock-names = "sysmmu", "master";
power-domains = <&pd_cam>;
#iommu-cells = <0>;
};
@@ -1020,8 +1020,8 @@ sysmmu_jpeg: sysmmu@11a60000 {
reg = <0x11a60000 0x1000>;
interrupt-parent = <&combiner>;
interrupts = <4 6>;
- clock-names = "sysmmu", "master";
clocks = <&clock CLK_SMMU_JPEG>, <&clock CLK_JPEG>;
+ clock-names = "sysmmu", "master";
power-domains = <&pd_cam>;
#iommu-cells = <0>;
};
@@ -1031,9 +1031,9 @@ sysmmu_rotator: sysmmu@12a30000 {
reg = <0x12a30000 0x1000>;
interrupt-parent = <&combiner>;
interrupts = <5 0>;
- clock-names = "sysmmu", "master";
clocks = <&clock CLK_SMMU_ROTATOR>,
<&clock CLK_ROTATOR>;
+ clock-names = "sysmmu", "master";
#iommu-cells = <0>;
};

@@ -1042,8 +1042,8 @@ sysmmu_fimd0: sysmmu@11e20000 {
reg = <0x11e20000 0x1000>;
interrupt-parent = <&combiner>;
interrupts = <5 2>;
- clock-names = "sysmmu", "master";
clocks = <&clock CLK_SMMU_FIMD0>, <&clock CLK_FIMD0>;
+ clock-names = "sysmmu", "master";
power-domains = <&pd_lcd0>;
#iommu-cells = <0>;
};

--
2.43.0