Re: [RFC PATCH v2 6/7] arm64: dts: amlogic: t7: add the ethernet controller

[Andrew Lunn]

On Wed, Oct 07, 2026 at 09:26:26AM +0100, Lucas Tanure wrote:
> The SoC has a Synopsys gigabit MAC, a block of glue registers that
> selects the interface type and trims the clock timing, and a
> multiplexer that points the management bus at the on-chip 100M PHY


> +					internal_ephy: ethernet-phy@8 {
> +						compatible = "ethernet-phy-id0180.3301",
> +							     "ethernet-phy-ieee802.3-c22";
> +						interrupts = <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>;
> +						reg = <8>;
> +						max-speed = <100>;

It is a 100M PHY. What supported speeds does it report in its
registers?

You should only need max-speed when the PHY is broken, says it can do
more than it actually can do, or when a 1G PHY only has two of the
four pairs connected to the outside world etc.

	Andrew