Re: [PATCH v3] riscv: Add ERRATA_MIPS_P8700_WFI to replace WFI with mips.pause

[Paul Walmsley]

On Thu, 17 Sep 2026, Aleksa Paunovic via B4 Relay wrote:

> From: Djordje Todorovic <djordje.todorovic@xxxxxxxxxxxxx>
> 
> The MIPS P8700 has bugs with the WFI instruction. A WFI instruction
> after a mispredicted branch can result in erroneous address
> translation on the MIPS P8700. MIPS has not published an erratum
> for this.
> 
> The workaround uses the RISC-V alternatives framework to patch all WFI
> instructions with the MIPS P8700 pause opcode (0x00501013)
> at runtime when running on P8700 hardware.
> 
> Two call sites are patched:
>  - arch/riscv/kernel/head.S: secondary hart parking loop
>  - arch/riscv/include/asm/processor.h: wait_for_interrupt()
> 
> Signed-off-by: Djordje Todorovic <djordje.todorovic@xxxxxxxxxxxxx>
> Signed-off-by: Aleksa Paunovic <aleksa.paunovic@xxxxxxxxxxxxx>

Thanks, queued for v7.4.


- Paul