[PATCH v2 3/4] arm64: dts: qcom: sm8750: Fix videocc clock inputs
From: Shawn Guo
Date: Thu Oct 08 2026 - 04:13:53 EST
The video clock controller binding describes three clock inputs for
SM8750: the board XO, the always-on board XO and the 32 kHz sleep clock.
The videocc node instead passes the board XO and GCC_VIDEO_AHB_CLK,
which is not an input of the controller.
Pass bi_tcxo_ao_div2 and the board sleep clock in place of the AHB
clock. No functional change, GCC_VIDEO_AHB_CLK is enabled independently
of this node.
Assisted-by: LLM
Signed-off-by: Shawn Guo <shengchao.guo@xxxxxxxxxxxxxxxx>
---
arch/arm64/boot/dts/qcom/sm8750.dtsi | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/qcom/sm8750.dtsi b/arch/arm64/boot/dts/qcom/sm8750.dtsi
index cf947acc5760..678e6e167bde 100644
--- a/arch/arm64/boot/dts/qcom/sm8750.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8750.dtsi
@@ -3338,7 +3338,8 @@ videocc: clock-controller@aaf0000 {
compatible = "qcom,sm8750-videocc";
reg = <0x0 0x0aaf0000 0x0 0x10000>;
clocks = <&bi_tcxo_div2>,
- <&gcc GCC_VIDEO_AHB_CLK>;
+ <&bi_tcxo_ao_div2>,
+ <&sleep_clk>;
power-domains = <&rpmhpd RPMHPD_MMCX>,
<&rpmhpd RPMHPD_MXC>;
required-opps = <&rpmhpd_opp_low_svs>,
--
2.43.0