Re: [PATCH 2/2] arm64: Apply existing Apple CPU workarounds to M3 and M4

[Marc Zyngier]

Hi Michael,

On Thu, 08 Oct 2026 13:15:41 +0100,
Michael Reeves via B4 Relay <devnull+michael.reeves077.gmail.com@xxxxxxxxxx> wrote:
> 
> From: Michael Reeves <michael.reeves077@xxxxxxxxx>
> 
> Add M3, M3 Pro, M3 Max and base M4 to apple_cpus so they receive the
> existing PMU trap and broken SEIS workarounds needed by KVM.
>

How have you established that these CPUs suffer from the same SEIS
erratum? I'm all for working around bugs, but I'd like to make sure
the new fancy stuff is indeed just as broken as the old shit...

For the record, the EDKII build in the QEMU EFI package that was in
part of Debian Bullseye was able to trigger the bug semi reliably
(series of writes to ICC_EOIR1_EL1 for interrupts that were never
active). This happens on handover to the guest kernel.

I can provide the binary (and a few scripts) to test this easily.

Should they have been fixed, we can always create a second
implementation list to cover the PMU.

Thanks,

	M.

-- 
Without deviation from the norm, progress is not possible.