[PATCH net-next 01/11] dt-bindings: net: qcom,ipq9574-ppe: Split EDMA reset into sys and apb
From: Luo Jie
Date: Thu Oct 08 2026 - 10:53:10 EST
The EDMA reset is described in the binding as a single reset, but the
hardware has two separate EDMA resets, the system reset and the APB reset.
The reset used in the example is a combined reset that covers both of them.
Describe the EDMA resets as two separate entries named "sys" and "apb", in
the same way as the EDMA clocks, and update the example accordingly.
The EDMA driver has not been merged upstream yet, and no in-tree device
tree uses the ethernet-dma node, so there is no existing user of this
binding and it is safe to update it without breaking the ABI.
Fixes: 1898fc572118 ("dt-bindings: net: Add PPE for Qualcomm IPQ9574 SoC")
Signed-off-by: Luo Jie <jie.luo@xxxxxxxxxxxxxxxx>
---
.../devicetree/bindings/net/qcom,ipq9574-ppe.yaml | 16 +++++++++++++---
1 file changed, 13 insertions(+), 3 deletions(-)
diff --git a/Documentation/devicetree/bindings/net/qcom,ipq9574-ppe.yaml b/Documentation/devicetree/bindings/net/qcom,ipq9574-ppe.yaml
index 6d0b21a10732..c899f4b56945 100644
--- a/Documentation/devicetree/bindings/net/qcom,ipq9574-ppe.yaml
+++ b/Documentation/devicetree/bindings/net/qcom,ipq9574-ppe.yaml
@@ -144,8 +144,14 @@ properties:
- const: apb
resets:
- maxItems: 1
- description: EDMA reset
+ items:
+ - description: EDMA system reset
+ - description: EDMA APB reset
+
+ reset-names:
+ items:
+ - const: sys
+ - const: apb
interrupts:
minItems: 65
@@ -170,6 +176,7 @@ properties:
- clocks
- clock-names
- resets
+ - reset-names
- interrupts
- interrupt-names
@@ -273,7 +280,10 @@ examples:
<&nsscc NSS_CC_PPE_EDMA_CFG_CLK>;
clock-names = "sys",
"apb";
- resets = <&nsscc EDMA_HW_RESET>;
+ resets = <&nsscc PPE_EDMA_ARES>,
+ <&nsscc PPE_EDMA_CFG_ARES>;
+ reset-names = "sys",
+ "apb";
interrupts = <GIC_SPI 363 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 364 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 365 IRQ_TYPE_LEVEL_HIGH>,
--
2.43.0