[PATCH net-next 04/11] docs: networking: Document IPQ5424 as a supported SoC

From: Luo Jie

Date: Thu Oct 08 2026 - 10:56:23 EST


Update the qualcomm PPE driver documentation to list IPQ5424 among the
supported SoCs, and describe the per-SoC PPE hardware differences.

The IPQ5424 PPE reuses the same switch core as IPQ9574, but runs at a clock
rate of 375 MHz and supports only 3 front panel ports along with the EDMA
FIFO port for host CPU communication. The EIP FIFO port is not available on
IPQ5424.

Signed-off-by: Luo Jie <jie.luo@xxxxxxxxxxxxxxxx>
---
.../networking/device_drivers/ethernet/qualcomm/ppe/ppe.rst | 8 ++++++++
1 file changed, 8 insertions(+)

diff --git a/Documentation/networking/device_drivers/ethernet/qualcomm/ppe/ppe.rst b/Documentation/networking/device_drivers/ethernet/qualcomm/ppe/ppe.rst
index 4ab299a28969..04c48cec66d5 100644
--- a/Documentation/networking/device_drivers/ethernet/qualcomm/ppe/ppe.rst
+++ b/Documentation/networking/device_drivers/ethernet/qualcomm/ppe/ppe.rst
@@ -167,6 +167,14 @@ PPE Driver Supported SoCs
The PPE driver supports the following IPQ SoC:

- IPQ9574
+ The PPE runs at a clock rate of 353 MHz. The switch core has 6 front panel
+ ports (port1 to port6) and two FIFO interfaces: the EDMA FIFO (port0) for
+ the host CPU communication and the EIP FIFO (port7) for the EIP engine.
+- IPQ5424
+ The PPE reuses the same switch core as IPQ9574 and runs at a clock rate of
+ 375 MHz. It supports 3 front panel ports (port1 to port3) with MAC0 to MAC2,
+ and only the EDMA FIFO interface (port0) for the host CPU communication. The
+ EIP FIFO and port4 to port6 are not available.


Enabling the Driver

--
2.43.0