[PATCH v6 0/6] Add support for USB phys in IPQ9650
From: Varadarajan Narayanan
Date: Fri Oct 09 2026 - 00:50:22 EST
This series
- Adds dt-bindings and driver changes for the high speed and super speed
phys in IPQ9650.
- IPQ9650 specific init tables to QMP super speed phy driver.
- The Femto high speed phy driver is refactored to accomodate differences
in the init sequences between SoCs first and then support for IPQ9650 is
included.
Signed-off-by: Varadarajan Narayanan <varadarajan.narayanan@xxxxxxxxxxxxxxxx>
---
Changes in v6:
- #include <linux/bitfield.h> in drivers/phy/qualcomm/phy-qcom-snps-femto-v2.c
to avoid build breaks in other (non arm64) architectures
- Link to v5: https://lore.kernel.org/r/20261006-phy-v5-0-cbe9330a6449@xxxxxxxxxxxxxxxx
Changes in v5:
- Use FIELD_PREP_CONST to define FSEL_24MHZ
- Change commit subject to 'Fix order of arguments to qcom_snps_hsphy_write_mask'
- Use data->{pre,post}_tuning in qcom_snps_hsphy_init() instead of a temporary
local variable
- Pick R-b from Dmitry for two patches
- Link to v4: https://lore.kernel.org/r/20261005-phy-v4-0-b04c4123ecb3@xxxxxxxxxxxxxxxx
Changes in v4:
- Rebase to top of tree
- Split 4th patch 'phy: qcom: snps-femto-v2: Move PHY init registers to config tables'
as follows:
phy: qcom: snps-femto-v2: Fix qcom_snps_hsphy_write_mask argument mixup
phy: qcom: snps-femto-v2: Move PHY init registers to config tables
- Link to v3: https://lore.kernel.org/r/20260924-phy-v3-0-088e7be0cfaa@xxxxxxxxxxxxxxxx
Changes in v3:
- No code changes
- Rebase to top of tree
- Pick two R-b tags
- Link to v2: https://lore.kernel.org/r/20260901-phy-v2-0-cc93d2f3b1bf@xxxxxxxxxxxxxxxx
Changes in v2:
- Pick one R-b from Krzysztof
- Use qcom,ipq9650-usb-hs-phy directly instead of adding a 6nm compatible
and falling back to it
- Change pre/post to pre_tuning/post_tuning
- Use array count instead of terminating entries
- Fix value/mask mixup in 2 places
- Link to v1: https://lore.kernel.org/r/20260824-phy-v1-0-257d68a3210b@xxxxxxxxxxxxxxxx
---
Varadarajan Narayanan (6):
dt-bindings: phy: qcom,qmp-usb: Add IPQ9650 USB3 PHY
dt-bindings: phy: qcom,usb-snps-femto-v2: Add IPQ9650 compatible
phy: qcom: qmp-usb: Add IPQ9650 USB3 PHY configuration
phy: qcom: snps-femto-v2: Fix order of arguments to qcom_snps_hsphy_write_mask
phy: qcom: snps-femto-v2: Move PHY init registers to config tables
phy: qcom: snps-femto-v2: Add IPQ9650 support
.../phy/qcom,sc8280xp-qmp-usb3-uni-phy.yaml | 2 +
.../bindings/phy/qcom,usb-snps-femto-v2.yaml | 2 +
drivers/phy/qualcomm/phy-qcom-qmp-usb.c | 118 +++++++++++++
drivers/phy/qualcomm/phy-qcom-snps-femto-v2.c | 194 ++++++++++++++++-----
4 files changed, 269 insertions(+), 47 deletions(-)
---
base-commit: ed06cc88c5e644da0f1ef397a836c7b1c10f41ac
change-id: 20260820-phy-664ed5ec0292
Best regards,
--
Varadarajan Narayanan <varadarajan.narayanan@xxxxxxxxxxxxxxxx>