Re: [RFC PATCH v2 6/7] arm64: dts: amlogic: t7: add the ethernet controller

[Lucas Tanure]

On Wed, Oct 7, 2026 at 2:12 PM Andrew Lunn <andrew@xxxxxxx> wrote:
>
> On Wed, Oct 07, 2026 at 09:26:26AM +0100, Lucas Tanure wrote:
> > The SoC has a Synopsys gigabit MAC, a block of glue registers that
> > selects the interface type and trims the clock timing, and a
> > multiplexer that points the management bus at the on-chip 100M PHY
>
>
> > +                                     internal_ephy: ethernet-phy@8 {
> > +                                             compatible = "ethernet-phy-id0180.3301",
> > +                                                          "ethernet-phy-ieee802.3-c22";
> > +                                             interrupts = <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>;
> > +                                             reg = <8>;
> > +                                             max-speed = <100>;
>
> It is a 100M PHY. What supported speeds does it report in its
> registers?
I cannot read them. On the VIM4 the MDIO mux points at the external
PHY and the internal one never probes, and no board in tree uses it.

The line was copied from meson-g12-common.dtsi, which has the same
max-speed = <100> on the same PHY ID. Dropped in v3.
>
> You should only need max-speed when the PHY is broken, says it can do
> more than it actually can do, or when a 1G PHY only has two of the
> four pairs connected to the outside world etc.
>
>         Andrew