RE: [PATCH v5 04/27] cxl: Add cxl_reset_dvsec_sequence() for vfio-pci
From: Manish Honap
Date: Fri Oct 09 2026 - 02:19:11 EST
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> Subject: Re: [PATCH v5 04/27] cxl: Add cxl_reset_dvsec_sequence() for vfio-pci
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> On Thu, 17 Sep 2026 00:05:17 +0530
> <mhonap@xxxxxxxxxx> wrote:
>
> > From: Manish Honap <mhonap@xxxxxxxxxx>
> >
> > vfio-pci needs to run a CXL reset on a passed-through Type-2 device
> > without the host-memory handling in cxl_reset_function(): the memory
> > behind the decoder belongs to the guest, so the HDM range collection
> > and host CPU cache flush that the host path performs must be skipped.
>
> Hi Manish,
>
> This cache flush being skipped bit concerns me. Who is issuing the necessary
> flushes in the vfio case? That is there to ensure we don't end up with random
> lines cached by PA (as well as VA if relevant), so they affect a guest just as
> much as the host.
> I'm not sure why it makes any difference who the memory belongs to.
Yes, you are right. I feel the reasoning in the commit message is wrong.
cxl_reset v14 already makes the invalidation mandatory on the host
path: it invalidates before the reset and again after the restore, and
refuses the reset when cpu_cache_has_invalidate_memregion() is false.
For v6, I will run the same sequence in vfio reset entry.
On a host where no cache maintenance driver has registered, invalidate
memregion check fails and CXL reset can't be run. vfio-cxl checks the same
condition at bind and continues without CXL support, so it never gives a guest
HDM memory it could not clear and invalidate on the next reset.
>
> >
> > Add cxl_reset_dvsec_sequence(), which runs the DVSEC reset under the
> > device lock and restores HDM state through
> > cxl_restore_state_after_pci_reset(), and cxl_reset_capable() to gate
> > it on a function-scoped reset. Both are exported to the vfio-cxl
> > module so vfio-pci core does not import the CXL namespace.
> >
> > CXL Reset always clears memory, so there is no caller Memory Clear choice.
> >
> > Assisted-by: LLM
> > Signed-off-by: Manish Honap <mhonap@xxxxxxxxxx>