Re: [PATCH v19 10/12] arm64: dts: qcom: kaanapali: Add CAMSS and CSIPHY block definitions
From: hangxiang . ma
Date: Fri Oct 09 2026 - 04:52:55 EST
On 10/9/26 4:40 PM, Bryan O'Donoghue <bryan.odonoghue@xxxxxxxxxx> wrote:
On 08/10/2026 08:14, Hangxiang Ma wrote:
> + csiphy0: phy@9523000 {
> + compatible = "qcom,kaanapali-csi2-phy";
> + reg = <0x0 0x09523000 0x0 0x2000>;
> +
> + clocks = <&camcc CAM_CC_CSIPHY0_CLK>,
> + <&camcc CAM_CC_CSI0PHYTIMER_CLK>,
> + <&camcc CAM_CC_CORE_AHB_CLK>;
> + clock-names = "core",
> + "timer",
> + "ahb";
> +
> + interrupts = <GIC_SPI 477 IRQ_TYPE_EDGE_RISING>;
> +
> + operating-points-v2 = <&csiphy_mxc_opp_table>;
> +
> + power-domains = <&camcc CAM_CC_TITAN_TOP_GDSC>,
> + <&rpmhpd RPMHPD_MMCX>,
> + <&rpmhpd RPMHPD_MXC>;
> + power-domain-names = "top",
> + "mmcx",
> + "mx";
> +
> + status = "disabled";
> + };
These PHYs should have their ports defined.
---
bod
Ack. Will follow the Hawi/Maili tempalte in next revision.
<https://lore.kernel.org/all/20260923-hawi-maili-camss-v1-7-cbbb42e534ef@xxxxxxxxxxxxxxxx/>
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Best Regards,
Hangxiang