[PATCH v2 13/14] arm64: dts: exynos8855: add cmu_hsi clock DT nodes
From: Raghav Sharma
Date: Fri Oct 09 2026 - 07:57:10 EST
Add required dt node for cmu_hsi block, while at it add
sysreg_hsi node which contians bits for DRCG and MEMCLK
which are used by clock driver
Signed-off-by: Alim Akhtar <alim.akhtar@xxxxxxxxxxx>
Signed-off-by: Raghav Sharma <raghav.s@xxxxxxxxxxx>
---
arch/arm64/boot/dts/exynos/exynos8855.dtsi | 21 +++++++++++++++++++++
1 file changed, 21 insertions(+)
diff --git a/arch/arm64/boot/dts/exynos/exynos8855.dtsi b/arch/arm64/boot/dts/exynos/exynos8855.dtsi
index b461de6a7548..3dd7a4c4c609 100644
--- a/arch/arm64/boot/dts/exynos/exynos8855.dtsi
+++ b/arch/arm64/boot/dts/exynos/exynos8855.dtsi
@@ -241,6 +241,27 @@ pinctrl_pericmmc: pinctrl@154f0000 {
interrupts = <GIC_SPI 395 IRQ_TYPE_LEVEL_HIGH>;
};
+ cmu_hsi: clock-controller@17000000 {
+ compatible = "samsung,exynos8855-cmu-hsi";
+ reg = <0x17000000 0x10000>;
+ #clock-cells = <1>;
+
+ clocks = <&oscclk>,
+ <&cmu_top CLKCMU_DOUT_HSI_NOC>,
+ <&cmu_top CLKCMU_DOUT_HSI_UFS_EMBD>;
+ clock-names = "oscclk",
+ "bus",
+ "ufs_embd";
+ samsung,sysreg = <&sysreg_hsi>;
+ };
+
+ sysreg_hsi: syscon@17020000 {
+ compatible = "samsung,exynos8855-hsi-sysreg",
+ "syscon";
+ reg = <0x17020000 0x10000>;
+ clocks = <&cmu_hsi CLK_GOUT_SYSREG_HSI>;
+ };
+
pinctrl_hsi_ufs: pinctrl@17040000 {
compatible = "samsung,exynos8855-pinctrl";
reg = <0x17040000 0x1000>;
--
2.34.1