Re: [PATCH 02/24] ARM: l2c: Serialize device reads with cache maintenance when requested
From: Arnd Bergmann
Date: Sat Oct 10 2026 - 10:31:16 EST
On Sat, Oct 10, 2026, at 14:59, Navid Ghahremani wrote:
> Provide the optional lock used by the tested ZX279128S workaround. Lock-
> off experiments hung the board; the proposed API remains subject to
> maintainer review.
>
> Assisted-by: LLM
> Signed-off-by: Navid Ghahremani <ghahramani.navid@xxxxxxxxx>
Hi Navid,
This seems like a very invasive change and at the same time does not
look generic enough as it requires changes to each driver behind the
PCIe bus.
Please describe how you ended up with this version, did you copy
the from the vendor BSP (where?) or did you arrive here by
trial-and-error?
This looks related to the CONFIG_OUTER_CACHE_SYNC workaround,
though I can't tell whether that means it should be connected to
that, or if the actual symptom you see may be caused by that
workaround. Do you have any more information here? Does the
problem appear both with arm,outer-sync-disable enabled and
disabled?
Arnd