[PATCH net v5 0/5] dpll: zl3073x: fix output pin frequency, esync and sibling notifications

[Ivan Vecera]

This series fixes several issues in the zl3073x output pin handling:

1. Do not offer 0 Hz as a supported frequency, it leads to a division
   by zero.
2. Reject N-divided output frequencies that cannot be set exactly.
3. Reject output frequencies whose divisor is too small for the HW.
4. Update the eSync period and width when the output frequency changes.
5. Notify the sibling pin when a shared output setting changes.

Changes since v4:
- Reorder: the setter checks for N-divided outputs (now patch 2) come
  before the probe-time divisor check (now patch 3), so every commit is
  consistent.
- Patch 1: move the 0 Hz check in zl3073x_pin_check_freq() here from
  the divisor patch, so the division by zero is fixed at this commit.
- Patch 5: fix the comment in zl3073x_dpll_nco_pin_register().
- Say in each commit message how the issue was found.

Changes since v3:
- New patch 1 to fix a division by zero reported by Sashiko.
- Patch 2: keep the P-pin quotient in 64 bits and reject values above
  U32_MAX; check esync_n_period < 2 first; fix comments and extack.
- Patch 3: state that the check is necessary but not sufficient for
  N-divided outputs.
- Patch 4: report the eSync frequency and pulse from the registers again
  instead of a fixed 1 Hz / 25%; compute the pulse in 64 bits.
- Patch 5: fix the sibling lookup kernel-doc and the commit message.

Changes since v2:
- Added patches 2 and 3.
- Patch 4: simplify zl3073x_out_esync_is_enabled().
- Patch 5: add/remove pins from zldpll->pins around dpll_pin_register()/
  dpll_pin_unregister() so a registered sibling is always found.

Changes since v1:
- Patch 4: pass the actual output carrier to zl3073x_out_esync_enable(),
  drop a redundant "? true : false", fix a comment typo.
- Patch 5: commit message wording.

v4: https://lore.kernel.org/netdev/20261009192556.272263-1-ivecera@xxxxxxxxxx/
v3: https://lore.kernel.org/netdev/20261006153116.347497-1-ivecera@xxxxxxxxxx/
v2: https://lore.kernel.org/netdev/20261002074520.30048-1-ivecera@xxxxxxxxxx/
v1: https://lore.kernel.org/netdev/20261001080648.1424172-1-ivecera@xxxxxxxxxx/

Ivan Vecera (5):
  dpll: zl3073x: do not offer 0 Hz as a supported pin frequency
  dpll: zl3073x: reject inexact frequencies for N-divided outputs
  dpll: zl3073x: reject output frequencies with too small divisor
  dpll: zl3073x: make embedded sync follow the output carrier frequency
  dpll: zl3073x: notify sibling pin when shared output config changes

 drivers/dpll/zl3073x/dpll.c | 237 +++++++++++++++++++++++++++---------
 drivers/dpll/zl3073x/out.h  |  36 ++++++
 drivers/dpll/zl3073x/prop.c |  56 +++++++--
 3 files changed, 264 insertions(+), 65 deletions(-)

-- 
2.56.0