RE: [PATCH v3] x86/mce: Do not treat cache hierarchy errors as memory errors

[Luck, Tony]

> On Intel and Zhaoxin, mce_is_memory_error() also returns true for cache
> hierarchy errors. All callers expect it to report memory errors only.
>
> The CEC uses it to count corrected DRAM errors. A corrected cache error
> only names the cache line that was affected, not a faulty DRAM page.
> With a faulty CPU core, the CEC therefore soft-offlines healthy pages.
> On an i9-9900K this caused about 500 soft-offline attempts per hour.
>
> Report only memory controller errors on Intel and Zhaoxin, as is
> already done for AMD.
>
> Fixes: fa92c5869426 ("x86, mce: Support memory error recovery for both UCNA and Deferred error in machine_check_poll")
> Signed-off-by: Adrian Schlegel <me@xxxxxxxxxxxxxxxxxx>

LGTM

Reviewed-by: Tony Luck <tony.luck@xxxxxxxxx>

-Tony