[PATCH v2] media: i2c: vd55g1: correct VD55G0 register access widths

[Jizhou Tong]

The VD55G0 frame length at 0x0458 and cold-start coarse exposure at
0x042e are 16-bit registers. The current 32-bit writes also overwrite
the vertical start at 0x045a and cold-start analogue gain at 0x0430,
respectively. Use 16-bit accesses to preserve those adjacent registers.

The applied analogue gain at 0x0066 is an 8-bit register. Reading it
as 16 bits also includes the next byte in the reported gain value.
Use the access widths from the ST reference driver for all three.

Link: https://github.com/STMicroelectronics/vd55g0-linux-driver/blob/a05627b0f6d8775aa54b6fa306e91f425f2cbf9e/vd55g0.c
Signed-off-by: Jizhou Tong <fqwqf@xxxxxxxxx>
---
Changes in v2:
- Add base/prerequisite patch IDs and make the unmerged dependency explicit.
- No source changes.

This is an incremental fix for Peter's unmerged VD55G0 support, not a
standalone change against media-next. Apply the VD55G0 prerequisite
changes first; the register map does not yet exist in media-next.

Prerequisite series, VD55G0 support patch:
https://lore.kernel.org/all/20260918221832.323751-2-pm@xxxxxxxxxxxxxxxx/

Rechecked on 12 October 2026: Peter's vd55g0-camera-support-v2-9
at 4a04accd5f68 and v2-8-on-master at b42bede8bce8 both still have
these three definitions. This patch applies to both source snapshots.

Validation: ARM64 W=1 driver-object build; descriptor checks against
the pinned ST reference driver and adjacent-register/gain-read tests.
IR capture has been used on SL7 with this fix in the downstream stack.

 drivers/media/i2c/vd55g1.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/media/i2c/vd55g1.c b/drivers/media/i2c/vd55g1.c
index 1a93e0fde5506f53e4df62568b913a4ae8633596..b20f086f259f3abb1d193a1812e70da3ba65e4dd 100644
--- a/drivers/media/i2c/vd55g1.c
+++ b/drivers/media/i2c/vd55g1.c
@@ -182,10 +182,10 @@ static const int vd55g0_reg_map[REG_MAX_INDEX] = {
 	[REG_MANUAL_DIGITAL_GAIN_CH2] = CCI_REG16_LE(0x0454),
 	[REG_MANUAL_DIGITAL_GAIN_CH3] = CCI_REG16_LE(0x0456),
 	[REG_APPLIED_COARSE_EXPOSURE] = CCI_REG16_LE(0x0064),
-	[REG_APPLIED_ANALOG_GAIN] = CCI_REG16_LE(0x0066),
+	[REG_APPLIED_ANALOG_GAIN] = CCI_REG8(0x0066),
 	[REG_APPLIED_DIGITAL_GAIN] = CCI_REG16_LE(0x0068),
 	[REG_AE_FORCE_COLDSTART] = CCI_REG8(0x042c),
-	[REG_AE_COLDSTART_COARSE_EXPOSURE] = CCI_REG32_LE(0x042e),
+	[REG_AE_COLDSTART_COARSE_EXPOSURE] = CCI_REG16_LE(0x042e),
 	[REG_NEXT_CTX] = CCI_REG16_LE(0x0478),
 	[REG_EXPOSURE_MAX_COARSE] = CCI_REG16_LE(0x096c),
 	[REG_CTX_REPEAT_COUNT_CTX0] = CCI_REG16_LE(0x0476),
@@ -194,7 +194,7 @@ static const int vd55g0_reg_map[REG_MAX_INDEX] = {
 	/* Context properties */
 	[REG_CTX_STRIDE] = 0x30,
 	[REG_CTX_EXP_MODE] = CCI_REG8(0x044c),
-	[REG_CTX_FRAME_LENGTH] = CCI_REG32_LE(0x0458),
+	[REG_CTX_FRAME_LENGTH] = CCI_REG16_LE(0x0458),
 	[REG_CTX_X_START] = CCI_REG16_LE(0x045e),
 	[REG_CTX_X_END] = CCI_REG16_LE(0x0460),
 	[REG_CTX_Y_START] = CCI_REG16_LE(0x0462),

base-commit: 72d3fcf802c45d00b300f25b848a93c3a2bd7c7e
prerequisite-patch-id: d4474f51d7a10cfd10a316ec2b09936490b14a79
prerequisite-patch-id: 0017cc56bf769ab00e67bdc0c5214951447cb716
prerequisite-patch-id: 95a2d9ff8168eb17010538d80f4b5428e2b7b798
prerequisite-patch-id: e717e32eac916ccafccf9e7a552ca0030085daa3
prerequisite-patch-id: 8fc4f7595aac33a2164adb41c139dc3218be5bc6
prerequisite-patch-id: 52bde56940b545c0e5f44d12811f9b9676bc311c
prerequisite-patch-id: c0b93409e330d4b874b3702d67b57e2c4b0bde32
prerequisite-patch-id: dbc6f65015852bbaf31e5f4efbee52c60bafb79f
prerequisite-patch-id: d5c9bb074014a20938df8b55bb9088aa7b26d37b
-- 
2.53.0