Re: [PATCH v3 4/4] arm64: dts: qcom: nord: Fix videocc clock inputs

[Bartosz Golaszewski]

On Sat, 17 Oct 2026 06:58:17 +0200, Shawn Guo
<shengchao.guo@xxxxxxxxxxxxxxxx> said:
> The video clock controller binding describes three clock inputs for
> Nord: the board XO, the active-only board XO and the 32 kHz sleep clock.
> The videocc node instead passes the board XO and NW_GCC_VIDEO_AHB_CLK,
> which is not an input of the controller.
>
> Pass bi_tcxo_ao_div2 and the board sleep clock in place of the AHB
> clock. No functional change, NW_GCC_VIDEO_AHB_CLK is kept always on by
> the NW GCC driver.
>
> Assisted-by: LLM
> Reviewed-by: Abel Vesa <abel.vesa@xxxxxxxxxxxxxxxx>
> Reviewed-by: Konrad Dybcio <konrad.dybcio@xxxxxxxxxxxxxxxx>
> Signed-off-by: Shawn Guo <shengchao.guo@xxxxxxxxxxxxxxxx>
> ---
>  arch/arm64/boot/dts/qcom/nord-embedded.dtsi | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/nord-embedded.dtsi b/arch/arm64/boot/dts/qcom/nord-embedded.dtsi
> index 1ab7d9bc3cfe..62d14be55839 100644
> --- a/arch/arm64/boot/dts/qcom/nord-embedded.dtsi
> +++ b/arch/arm64/boot/dts/qcom/nord-embedded.dtsi
> @@ -886,7 +886,8 @@ videocc: clock-controller@aaf0000 {
>  		compatible = "qcom,nord-videocc";
>  		reg = <0x0 0x0aaf0000 0x0 0x10000>;
>  		clocks = <&bi_tcxo_div2>,
> -			 <&nwgcc NW_GCC_VIDEO_AHB_CLK>;
> +			 <&bi_tcxo_ao_div2>,
> +			 <&sleep_clk>;
>  		power-domains = <&rpmhpd RPMHPD_MMCX>,
>  				<&rpmhpd RPMHPD_MXC>;
>  		required-opps = <&rpmhpd_opp_low_svs>,
> --
> 2.43.0
>
>

Tested-by: Bartosz Golaszewski <bartosz.golaszewski@xxxxxxxxxxxxxxxx>