[PATCH v4 0/3] usb: dwc3: xilinx: Add Versal2 MMI USB 3.2 controller support

From: Radhey Shyam Pandey

Date: Tue Oct 20 2026 - 07:36:41 EST


This series introduces support for the Multimedia Integrated (MMI) USB
3.2 Dual-Role Device (DRD) controller on Xilinx Versal2 platforms.

The controller supports SSP(10-Gbps), SuperSpeed, high-speed, full-speed
and low-speed operation modes.

The driver is required for the clock, reset and platform specific
initialization (coherency/TX_DEEMPH etc). In this initial version typec
reversibility is not implemented and it is assumed that USB3 PHY TCA mux
programming is done by MMI configuration data object (CDOs) and TI PD
controller is configured using external tiva programmer on VEK385
evaluation board.

This series depends on:
https://lore.kernel.org/all/20260928120015.3152461-1-radhey.shyam.pandey@xxxxxxx [1]
https://lore.kernel.org/all/20260928134215.3194328-1-radhey.shyam.pandey@xxxxxxx [2]

Changes for v4:
- Switch Versal Gen2 MMI to the flat probe model: embed struct dwc3 in the
glue private data and call dwc3_core_probe() directly, rather than
instantiating a child snps,dwc3 node.
- Binding: drop the wrapper parent address space and make reg required, as
the MMI integration has no glue register space of its own.
- Replace dwc3_xlnx_config with dwc3_xlnx_platdata {init, teardown, flat}
and split probe into common, flat and legacy paths. ZynqMP and Versal
behaviour is unchanged.
- Pass GSBUSCFG0.REQINFO and the Gen2 TX de-emphasis value through
struct dwc3_properties instead of software node properties.
- Acquire the USB3 PHY and reset in dwc3_xlnx_init_versal2(), undone by
devm_add_action_or_reset(); drop the explicit assert delay now that
phy_init() sits between assert and deassert.

Changes for v3:
- Return -ENODEV from probe if device_get_match_data() is NULL.
- Replace map_resource with no_mem_map (Versal2 MMI only; others default
MMIO map).
- Add PHY warm-reset assert delay.
- Loop all num_usb3_ports with one de-emphasis value.
- Set default as DWC3_LCSR_TX_DEEMPH_UNSPECIFIED default and only set
snps,lcsr-tx-deemph when not unspecified.

Changes for v2:
- DT binding: fix MHz spacing (SI convention), reorder description
before $ref in xlnx,usb-syscon, restore zynqmp-dwc3 example and add
versal2-mmi-dwc3 example, fix node name for no-reg case, use 1/1
address/size configuration and lowercase hex in syscon offsets.
- Split config struct refactoring (device_get_match_data,dwc3_xlnx_config)
into a separate preparatory patch.
- Fix error message capitalization to lowercase per kernel convention.
- Rename property snps,lcsr_tx_deemph to snps,lcsr-tx-deemph (hyphens).
- Fix double space in comment and missing blank line in core.h.
- Use platform data instead of of_device_is_compatible() check for
deemphasis support.

Link: https://lore.kernel.org/all/20260429173050.1772377-1-radhey.shyam.pandey@xxxxxxx [v3]
Link: https://lore.kernel.org/all/20260330190304.1841593-1-radhey.shyam.pandey@xxxxxxx [v2]
Link: https://lore.kernel.org/all/20251119193036.2666877-1-radhey.shyam.pandey@xxxxxxx [v1]


Radhey Shyam Pandey (3):
dt-bindings: usb: amd,versal2-mmi-dwc3: Add MMI USB support on Versal
Gen2 platform
usb: dwc3: xilinx: Add Versal2 MMI USB 3.2 controller support with
flat probe model
usb: dwc3: xilinx: Add support to program MMI USB TX deemphasis

.../bindings/usb/amd,versal2-mmi-dwc3.yaml | 92 +++++
drivers/usb/dwc3/core.c | 12 +
drivers/usb/dwc3/core.h | 8 +
drivers/usb/dwc3/dwc3-generic-plat.c | 11 +-
drivers/usb/dwc3/dwc3-xilinx.c | 333 ++++++++++++++++--
drivers/usb/dwc3/glue.h | 4 +
6 files changed, 424 insertions(+), 36 deletions(-)
create mode 100644 Documentation/devicetree/bindings/usb/amd,versal2-mmi-dwc3.yaml

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2.43.0