Re: [PATCH v2 3/4] dt-bindings: serial: snps-dw-apb-uart: Add Allwinner A733

[Andre Przywara]

Hi Vinicius,

On 10/19/26 22:06, Vinicius Pedrosa wrote:
> The Allwinner A733 UART is a DesignWare APB UART, but it needs
> SoC-specific handling so the driver can avoid stopping its clock during
> termios changes.
>
> Add an A733-specific compatible, with "snps,dw-apb-uart" as the
> fallback.
>
> Signed-off-by: Vinicius Pedrosa <vinicius.eduardo.pedrosa@xxxxxxxxx>
> Acked-by: Conor Dooley <conor.dooley@xxxxxxxxxxxxx>
> ---
>   Documentation/devicetree/bindings/serial/snps-dw-apb-uart.yaml | 1 +
>   1 file changed, 1 insertion(+)
>
> diff --git a/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.yaml b/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.yaml
> index e2ca126d58ba..532392dd54cf 100644
> --- a/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.yaml
> +++ b/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.yaml
> @@ -60,6 +60,7 @@ properties:
>             - const: renesas,rzn1-uart
>         - items:
>             - enum:
> +              - allwinner,sun60i-a733-uart

So if I understand correctly, this compatible is really there for the 
clock gating issue, right? As the DLF part is now somewhat correctly 
auto-detected?
Can you share what your termios test looks like? Because I assume this 
affects more Allwinner SoCs (the DLF change definitely does).
Then we should add more compatible strings here. If there is a simple 
test, I am happy to run this on a bunch of boards, to give you a list.

Cheers,
Andre

>                 - anlogic,dr1v90-uart
>                 - brcm,bcm11351-dw-apb-uart
>                 - brcm,bcm21664-dw-apb-uart