[PATCH 2/2] arm64: dts: imx8qm-tqma8qm: Re-enable A72 cluster after ERR050104 workaround

[Peng Fan (OSS)]

From: Peng Fan <peng.fan@xxxxxxx>

The ERR050104 cache coherency workaround for i.MX8QM/8QP has been
merged upstream (d44e08dab27d). The workaround addresses the incorrect
wiring of upper address bits in the A53 subsystem that corrupts TLBI and
IC maintenance operations between A53 and A72 clusters.

Previously the A72 CPUs (cpu@100, cpu@101) and cpu-map were removed
from the TQMa8QM DTSI with an explicit comment "Due to missing
workaround for ERR050104". With the software workaround is in place,
remove the workaround-comment block and restore the full SMP topology.

Signed-off-by: Peng Fan <peng.fan@xxxxxxx>
---
 arch/arm64/boot/dts/freescale/imx8qm-tqma8qm.dtsi | 7 -------
 1 file changed, 7 deletions(-)

diff --git a/arch/arm64/boot/dts/freescale/imx8qm-tqma8qm.dtsi b/arch/arm64/boot/dts/freescale/imx8qm-tqma8qm.dtsi
index f0e398eb2aad7..8cd6e75eb87a9 100644
--- a/arch/arm64/boot/dts/freescale/imx8qm-tqma8qm.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8qm-tqma8qm.dtsi
@@ -15,13 +15,6 @@ / {
 	model = "TQ-Systems i.MX8QM TQMa8QM";
 	compatible = "tq,imx8qm-tqma8qm", "fsl,imx8qm";
 
-	/* Due to missing workaround for ERR050104 */
-	cpus {
-		/delete-node/ cpu-map;
-		/delete-node/ cpu@100;
-		/delete-node/ cpu@101;
-	};
-
 	memory@80000000 {
 		device_type = "memory";
 		/*

-- 
2.34.1