[PATCH] drm/amd/display: Don't select zero V_TOTAL_MIN/MAX on DCN2 seamless boot
From: Kylie C via B4 Relay
Date: Thu Oct 22 2026 - 09:35:56 EST
From: Kylie C <kyliepc@xxxxxxxxx>
Initialize V_TOTAL_MIN/MAX to V_TOTAL before enabling the selectors if
they are still 0, as optc1_program_timing() does without seamless boot.
Tested on Renoir (DCN 2.1) eDP with amdgpu.seamless=1.
This removes the flash between the bios logo & plymouth on my laptop.
Signed-off-by: Kylie C <kyliepc@xxxxxxxxx>
---
Fixes the black screen when enabling amdgpu.seamless=1 on Renoir APU
With this plymouth smooth boot is possible on this hardware
---
drivers/gpu/drm/amd/display/dc/optc/dcn20/dcn20_optc.c | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/drivers/gpu/drm/amd/display/dc/optc/dcn20/dcn20_optc.c b/drivers/gpu/drm/amd/display/dc/optc/dcn20/dcn20_optc.c
index 73cc8a713..2cdfe3d7a 100644
--- a/drivers/gpu/drm/amd/display/dc/optc/dcn20/dcn20_optc.c
+++ b/drivers/gpu/drm/amd/display/dc/optc/dcn20/dcn20_optc.c
@@ -449,6 +449,13 @@ void optc2_lock_doublebuffer_disable(struct timing_generator *optc)
void optc2_setup_manual_trigger(struct timing_generator *optc)
{
struct optc *optc1 = DCN10TG_FROM_TG(optc);
+ uint32_t v_total, v_total_max;
+
+ REG_GET(OTG_V_TOTAL_MAX, OTG_V_TOTAL_MAX, &v_total_max);
+ if (!v_total_max) {
+ REG_GET(OTG_V_TOTAL, OTG_V_TOTAL, &v_total);
+ optc->funcs->set_vtotal_min_max(optc, v_total, v_total);
+ }
/* Set the min/max selectors unconditionally so that
* DMCUB fw may change OTG timings when necessary
---
base-commit: 77f548b127c6de34ce271fa09ba270cb1ef9f2da
change-id: 20261022-dcn2-seamless-vtotal-351d08d2df54
Best regards,
--
Kylie C <kyliepc@xxxxxxxxx>